NXP Semiconductors KL25 Series - LLWU Flag 3 Register (LLWU_F3)

LLWU_F2 field descriptions (continued)
Field Description
4
WUF12
Wakeup Flag For LLWU_P12
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF12.
0 LLWU_P12 input was not a wakeup source
1 LLWU_P12 input was a wakeup source
3
WUF11
Wakeup Flag For LLWU_P11
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF11.
0 LLWU_P11 input was not a wakeup source
1 LLWU_P11 input was a wakeup source
2
WUF10
Wakeup Flag For LLWU_P10
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF10.
0 LLWU_P10 input was not a wakeup source
1 LLWU_P10 input was a wakeup source
1
WUF9
Wakeup Flag For LLWU_P9
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF9.
0 LLWU_P9 input was not a wakeup source
1 LLWU_P9 input was a wakeup source
0
WUF8
Wakeup Flag For LLWU_P8
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF8.
0 LLWU_P8 input was not a wakeup source
1 LLWU_P8 input was a wakeup source
15.3.8 LLWU Flag 3 register (LLWU_F3)
LLWU_F3 contains the wakeup flags indicating which internal wakeup source caused the
MCU to exit LLS or VLLS mode. For LLS, this is the source causing the CPU interrupt
flow. For VLLS, this is the source causing the MCU reset flow.
For internal peripherals that are capable of running in a low-leakage power mode, such as
iRTC or CMP modules, the flag from the associated peripheral is accessible as the
MWUFx bit. The flag will need to be cleared in the peripheral instead of writing a 1 to
the MWUFx bit.
Memory map/register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
258 Freescale Semiconductor, Inc.