NXP Semiconductors KL25 Series - Register Definition

40.2 Register definition
The UART has 8-bit registers to control baud rate, select UART options, report UART
status, select DMA options, and for transmit/receive data.
Refer to the direct-page register summary in the memory chapter of this document or the
absolute address assignments for all UART registers. This section refers to registers and
control bits only by their names. A Freescale-provided equate or header file is used to
translate these names into the appropriate absolute addresses.
UART memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_B000 UART Baud Rate Register: High (UART1_BDH) 8 R/W 00h 40.2.1/751
4006_B001 UART Baud Rate Register: Low (UART1_BDL) 8 R/W 04h 40.2.2/751
4006_B002 UART Control Register 1 (UART1_C1) 8 R/W 00h 40.2.3/752
4006_B003 UART Control Register 2 (UART1_C2) 8 R/W 00h 40.2.4/753
4006_B004 UART Status Register 1 (UART1_S1) 8 R C0h 40.2.5/755
4006_B005 UART Status Register 2 (UART1_S2) 8 R/W 00h 40.2.6/756
4006_B006 UART Control Register 3 (UART1_C3) 8 R/W 00h 40.2.7/758
4006_B007 UART Data Register (UART1_D) 8 R/W 00h 40.2.8/760
4006_B008 UART Control Register 4 (UART1_C4) 8 R/W 00h 40.2.9/760
4006_C000 UART Baud Rate Register: High (UART2_BDH) 8 R/W 00h 40.2.1/751
4006_C001 UART Baud Rate Register: Low (UART2_BDL) 8 R/W 04h 40.2.2/751
4006_C002 UART Control Register 1 (UART2_C1) 8 R/W 00h 40.2.3/752
4006_C003 UART Control Register 2 (UART2_C2) 8 R/W 00h 40.2.4/753
4006_C004 UART Status Register 1 (UART2_S1) 8 R C0h 40.2.5/755
4006_C005 UART Status Register 2 (UART2_S2) 8 R/W 00h 40.2.6/756
4006_C006 UART Control Register 3 (UART2_C3) 8 R/W 00h 40.2.7/758
4006_C007 UART Data Register (UART2_D) 8 R/W 00h 40.2.8/760
4006_C008 UART Control Register 4 (UART2_C4) 8 R/W 00h 40.2.9/760
Register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
750 Freescale Semiconductor, Inc.