ADC Channel
(SC1n[ADCH])
Channel Input signal
(SC1n[DIFF]= 1)
Input signal
(SC1n[DIFF]= 0)
01011 AD11 Reserved ADC0_SE11
01100 AD12 Reserved ADC0_SE12
01101 AD13 Reserved ADC0_SE13
01110 AD14 Reserved ADC0_SE14
01111 AD15 Reserved ADC0_SE15
10000 AD16 Reserved Reserved
10001 AD17 Reserved Reserved
10010 AD18 Reserved Reserved
10011 AD19 Reserved Reserved
10100 AD20 Reserved Reserved
10101 AD21 Reserved Reserved
10110 AD22 Reserved Reserved
10111 AD23 Reserved 12-bit DAC0 Output/
ADC0_SE23
11000 AD24 Reserved Reserved
11001 AD25 Reserved Reserved
11010 AD26 Temperature Sensor (Diff) Temperature Sensor (S.E)
11011 AD27 Bandgap (Diff)
2
Bandgap (S.E)
2
11100 AD28 Reserved Reserved
11101 AD29 -VREFH (Diff) VREFH (S.E)
11110 AD30 Reserved VREFL
11111 AD31 Module Disabled Module Disabled
1. ADCx_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b. Refer to MUXSEL description in ADC chapter
for details.
2. This is the PMC bandgap 1V reference voltage. Prior to reading from this ADC channel, ensure that you enable the
bandgap buffer by setting the PMC_REGSC[BGBE] bit. Refer to the device data sheet for the bandgap voltage (V
BG
)
specification.
3.7.1.4 ADC Analog Supply and Reference Connections
This device includes dedicated VDDA and VSSA pins.
This device contains separate VREFH and VREFL pins on 48-pin and higher devices.
These pins are internally connected to VDDA and VSSA respectively, on 32-pin devices.
3.7.1.5 ADC Reference Options
The ADC supports the following references:
• VREFH/VREFL - connected as the primary reference option
• VDDA - connected as the V
ALT
reference option
Analog
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
80 Freescale Semiconductor, Inc.
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