NXP Semiconductors MKL25Z128VLK4 - Additional Details on Decorated Addresses and GPIO Accesses

Table 17-7. Cycle definitions of decorated load: unsigned bit field extract
Pipeline Stage Cycle
x x+1 x+2
BME AHB_ap Forward addr to memory;
Decode decoration; Capture
address, attributes
Idle AHB address phase <next>
BME AHB_dp <previous> Perform memory read; Form
bit mask; Form (rdata & mask)
and capture destination data
in register
Logically right shift registered
data; Return justified rdata to
master
17.4.3 Additional Details on Decorated Addresses and GPIO
Accesses
As previously noted, the peripheral address space occupies a 516 KB region: 512 KB
based at 0x4000_0000 plus a 4 KB space based at 0x400F_F000 for GPIO accesses. This
memory layout provides compatibility with the Kinetis K Family and provides 129
address "slots", each 4 KB in size.
The GPIO address space is multiply-mapped by the hardware: it appears at the "standard"
system address 0x400F_F000 and is physically located in the address slot corresponding
to address 0x4000_F000. Decorated loads and stores create a slight complication
involving accesses to the GPIO. Recall the use of address[19] varies by decorated
operation; for AND, OR, XOR, LAC1 and LAS1, this bit functions as a true address bit,
while for BFI and UBFX, this bit defines the least significant bit of the "w" bit field
specifier.
As a result, undecorated GPIO references and decorated AND, OR, XOR, LAC1 and
LAS1 operations can use the standard 0x400F_F000 base address, while decorated BFI
and UBFX operations must use the alternate 0x4000_F000 base address. Another
implementation can simply use 0x400F_F000 as the base address for all undecorated
GPIO accesses and 0x4000_F000 as the base address for all decorated accesses. Both
implementations are supported by the hardware.
Table 17-8. Decorated peripheral and GPIO address details
Peripheral address space Description
0x4000_0000 - 0x4007_FFFF Undecorated (normal) peripheral accesses
0x4008_0000 - 0x400F_EFFF Illegal addresses; attempted references are aborted and error terminated
0x400F_F000 - 0x400F_FFFF Undecorated (normal) GPIO accesses using standard address
0x4010_0000 - 0x43FF_FFFF Illegal addresses; attempted references are aborted and error terminated
Table continues on the next page...
Chapter 17 Bit Manipulation Engine (BME)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 287