NXP Semiconductors MKL25Z128VLK4 - Freescale Semiconductor, Inc

START
IN PEE MODE
C1 = 0x90
CHECK
S[CLKST] = %10 ?
NO
NO
NO
NO
YES
C2 = 0x02
CONTINUE
IN BLPI MODE
YES
YES
CHECK
S[PLLST] = 0?
C1 = 0x54
CHECK
S[IREFST] = 0?
CHECK
S[CLKST] = %01?
YES
NO
YES
(C2[LP] = 1)
C6 = 0x00
IN
BLPE MODE ?
IN
BLPE MODE ?
NO
YES
C2 = 0x1C
(C2[LP] = 0)
C2 = 0x1E
ENTER
BLPE MODE ?
(C2[LP]=1)
Figure 24-18. Flowchart of PEE to BLPI mode transition using an 4 MHz crystal
Chapter 24 Multipurpose Clock Generator (MCG)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 401