NXP Semiconductors MKL25Z128VLK4 - Functional Description

DACx_C2 field descriptions (continued)
Field Description
3–1
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
0
DACBFUP
DAC Buffer Upper Limit
Selects the upper limit of the DAC buffer. The buffer read pointer cannot exceed it.
30.5 Functional description
The 12-bit DAC module can select one of the two reference inputs—DACREF_1 and
DACREF_2 as the DAC reference voltage, V
in
by C0[DACRFS]. See the module
introduction for information on the source for DACREF_1 and DACREF_2.
When the DAC is enabled, it converts the data in DACDAT0[11:0] or the data from the
DAC data buffer to a stepped analog output voltage. The output voltage range is from V
in
to V
in
∕4096, and the step is V
in
∕4096.
30.5.1 DAC data buffer operation
When the DAC is enabled and the buffer is not enabled, the DAC module always
converts the data in DAT0 to analog output voltage.
When both the DAC and the buffer are enabled, the DAC converts the data in the data
buffer to analog output voltage. The data buffer read pointer advances to the next word
whenever any hardware or software trigger event occurs. Refer to Introduction for the
hardware trigger connection.
The data buffer can be configured to operate in Normal mode, Swing mode, or One-Time
Scan mode. When the buffer operation is switched from one mode to another, the read
pointer does not change. The read pointer can be set to any value between 0 and
C2[DACBFUP] by writing C2[DACBFRP].
30.5.1.1 DAC data buffer interrupts
There are several interrupts and associated flags that can be configured for the DAC
buffer. SR[DACBFRPBF] is set when the DAC buffer read pointer reaches the DAC
buffer upper limit, that is, C2[DACBFRP] = C2[DACBFUP]. SR[DACBFRPTF] is set
when the DAC read pointer is equal to the start position, 0.
Chapter 30 12-bit Digital-to-Analog Converter (DAC)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 543