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NXP Semiconductors MKL25Z128VLK4 - Introduction

NXP Semiconductors MKL25Z128VLK4
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Chapter 41
General-Purpose Input/Output (GPIO)
41.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration information.
The general-purpose input and output (GPIO) module communicates to the processor
core via a zero wait state interface for maximum pin performance. The GPIO registers
support 8-bit, 16-bit or 32-bit accesses.
The GPIO data direction and output data registers control the direction and output data of
each pin when the pin is configured for the GPIO function. The GPIO input data register
displays the logic value on each pin when the pin is configured for any digital function,
provided the corresponding Port Control and Interrupt module for that pin is enabled.
Efficient bit manipulation of the general-purpose outputs is supported through the
addition of set, clear, and toggle write-only registers for each port output data register.
41.1.1 Features
Features of the GPIO module include:
Pin input data register visible in all digital pin-multiplexing modes
Pin output data register with corresponding set/clear/toggle registers
Pin data direction register
Zero wait state access to GPIO registers through IOPORT
NOTE
GPIO module is clocked by system clock.
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 771

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