Table 3-41. Reference links to related information (continued)
Topic Related module Reference
System memory map System memory map
Clocking Clock Distribution
Power management Power management
Signal Multiplexing Port control Signal Multiplexing
3.8.3.1 LPTMR Instantiation Information
The low-power timer (LPTMR) allows operation during all power modes. The LPTMR
can operate as a real-time interrupt or pulse accumulator. It includes a 15-bit prescaler
(real-time interrupt mode) or glitch filter (pulse accumulator mode).
The LPTMR can be clocked from the internal reference clock, the internal 1 kHz LPO,
OSCERCLK, or an external 32.768 kHz crystal. In VLLS0 mode, the clocking option is
limited to an external pin with the OSC configured for bypass (external clock) operation.
An interrupt is generated (and the counter may reset) when the counter equals the value
in the 16-bit compare register.
3.8.3.2 LPTMR pulse counter input options
The LPTMR_CSR[TPS] bitfield configures the input source used in pulse counter mode.
The following table shows the chip-specific input assignments for this bitfield.
LPTMR_CSR[TPS] Pulse counter input number Chip input
00 0 CMP0 output
01 1 LPTMR_ALT1 pin
10 2 LPTMR_ALT2 pin
11 3 LPTMR_ALT3 pin
3.8.3.3 LPTMR prescaler/glitch filter clocking options
The prescaler and glitch filter of the LPTMR module can be clocked from one of four
sources determined by the LPTMR0_PSR[PCS] bitfield. The following table shows the
chip-specific clock assignments for this bitfield.
Chapter 3 Chip Configuration
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 89
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