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NXP Semiconductors MPC5566
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Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-77
Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
EWC
0000000000
000000000 0 0 0 0 0
W
Reset00000000000000000000000000000000
Figure 25-56. Development Control Register 2 (DC2)
Table 25-48. DC2 Field Description
Field Description
31–24
EWC
1
1
The EOC bits in DC1 must be programmed to trigger EVTO on watchpoint occurrence for the EWC bits to have any
effect.
EVTO Watchpoint Configuration
00000000 = No watchpoints trigger EVTO
1XXXXXXX = Reserved
X1XXXXXX = Reserved
XX1XXXXX = Reserved
XXX1XXXX = Reserved
XXXX1XXX = Internal watchpoint #1 triggers EVTO
XXXXX1XX = Internal watchpoint #2 triggers EVTO
XXXXXX1X = Reserved
XXXXXXX1 = Reserved
23–0 Reserved, read as 0.

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