NXP Semiconductors MPC5566 - Pad Configuration Register 135 (SIU_PCR135)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-72 Freescale Semiconductor
6.3.1.90 Pad Configuration Register 135 (SIU_PCR135)
The SIU_PCR135 register controls the function, direction, and electrical attributes of
ETPUA[21]_IRQ[9]_GPIO[135]. Both the input and output channels of ETPUA[21] are connected.
Figure 6-91. ETPUA[21]_IRQ[9]_GPIO[135] Pad Configuration Register (SIU_PCR135)
Refer to Table 6-19 for bit field definitions. Table 6-90 lists the PA fields for
ETPUA[21]_IRQ[9]_GPIO[135].
6.3.1.91 Pad Configuration Register 136 (SIU_PCR136)
The SIU_PCR136 register controls the function, direction, and electrical attributes of
ETPUA[22]_IRQ[10]_GPIO[136]. Both the input and output channels of ETPUA[22] are connected.
Figure 6-92. ETPUA[22]_IRQ[10]_GPIO[136] Pad Configuration Register (SIU_PCR136)
Address: Base + 0x014E Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as IRQ[9], the OBE bit has no effect. The OBE bit must be set to one for ETPUA[21] or GPIO[135] when
configured as outputs.
IBE
2
2
When the pad is configured as an output, setting the IBE bit to 1 allows the pin state to be reflected in the corresponding GPDI
register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to one for ETPUA[21] or GPIO[135]
when configured as inputs.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[21] pin is determined by the WKPCFG pin.
Table 6-90. PCR135 PA Field Definitions
PA Field Pin Function
0b00 GPIO[135]
0b01 ETPUA[21]
0b10 IRQ[9]
0b11 ETPUA[21]
Address: Base + 0x0150 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as IRQ[10], the OBE bit has no effect. The OBE bit must be set to 1 for ETPUA[22] or GPIO[136] when con-
figured as output.
IBE
2
2
When the pad is configured as an output, setting the IBE bit to 1 allows the pin state to be reflected in the corresponding GPDI
register. Clear the IBE bit to 0 to reduce power consumption. The IBE bit must be set to 1 for ETPUA[22] or GPIO[136] when
configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[22] pin is determined by the WKPCFG pin.