EasyManua.ls Logo

NXP Semiconductors MPC5566 - Pad Configuration Register 145 (SIU_PCR145)

NXP Semiconductors MPC5566
1268 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-75
Refer to Table 6-19 for bit field definitions. Table 6-94 lists the PA fields for
ETPUA[28:30]_PCSC[1:3]_GPIO[142:144].
6.3.1.95 Pad Configuration Register 145 (SIU_PCR145)
The SIU_PCR145 register controls the function, direction, and electrical attributes of
ETPUA[31]_PCSC[4]_GPIO[145].
Figure 6-96. ETPUA[31]_PCSC[4]_GPIO[145] Pad Configuration Register (SIU_PCR145)
Refer to Table 6-19 for bit field definitions. Table 6-95 lists the PA fields for
ETPUA[31]_PCSC[4]_GPIO[145].
6.3.1.96 Pad Configuration Register 146 (SIU_PCR146)
The SIU_PCR146 register controls the function, direction, and electrical attributes of
TCRCLKB_IRQ
[6]_GPIO[146].
Table 6-94. PCR142–PCR144 PA Field Definitions
PA Field Pin Function
0b00 GPIO[142:144]
0b01 ETPUA[28:30]
0b10 PCSC[1:3]
0b11 ETPUA[28:30]
Address: Base + 0x0162 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as PCSC[4], the OBE bit has no effect. When configured as ETPUA[31] output or GPDO, set the OBE bit 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 show the pin state in the corresponding GPDI register. Clear the
IBE bit to 0 reduces power consumption. Set the IBE bit to 1 for ETPUA or GPIO when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[31] and PCSC[4] pin is determined by the WKPCFG pin.
Table 6-95. PCR145 PA Field Definitions
PA Field Pin Function
0b00 GPIO[145]
0b01 ETPUA[31]
0b10 PCSC[4]
0b11 ETPUA[31]

Table of Contents

Related product manuals