System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-76 Freescale Semiconductor
Figure 6-97. TCRCLKB_IRQ[6]_GPIO[146] Pad Configuration Register (SIU_PCR146)
Refer to Table 6-19 for bit field definitions. Table 6-96 lists the PA fields for
TCRCLKB_IRQ[6]_GPIO[146].
6.3.1.97 Pad Configuration Registers 147–162 (SIU_PCR147–SIU_PCR162)
The SIU_PCR147–SIU_PCR162 registers control the function, direction, and electrical attributes of
ETPUB[0:15]_ETPUB[16:31]_GPIO[147:162]. Both the input and output channels of ETPUB[0:15] are
connected. Only the output channels of ETPUB[16:31] are connected.
Figure 6-98. ETPUB[0:15]_ETPUB[16:31]_GPIO[147:162]
Pad Configuration Registers (SIU_PCR147–SIU_PCR162)
Address: Base + 0x0164 Access: R/W
0123456789101112131415
R 0000
PA OBE
1
1
When configured as TCRCLKB or IRQ[6], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
00
ODE HYS SRC WPE WPS
W
RESET: 0000000000000011
Table 6-96. PCR146 PA Field Definitions
PA Field Pin Function
0b00 GPIO[146]
0b01 TCRCLKB
0b10 IRQ[6]
0b11 TCRCLKB
Address: Base + (0x0166–0x0184) Access: R/W
0123456789101112131415
R 0000
PA OBE
1
1
The OBE bit must be set to one for ETPUB[0:15] or GPIO[147:162] when configured as outputs. When configured as
ETPUB[16:31], the OBE bit has no effect.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for ETPUB[0:15] or GPIO[147:162] when configured as inputs.
00
ODE HYS SRC WPE WPS
W
RESET: 000000000000001U
3
3
The weak pullup/down selection at reset for the ETPUB[0:15] pins is determined by the WKPCFG pin.
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