NXP Semiconductors MPC5606S - Register Map

Register Map
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1267
Parallel GPIO Pad Data In Register PGPDI1 32-bit Base + 0x0C44
Parallel GPIO Pad Data In Register PGPDI2 32-bit Base + 0x0C48
Parallel GPIO Pad Data In Register PGPDI3 32-bit Base + 0x0C4C
Reserved — — Base +
(0x0C50–0x0C7)
Masked Parallel GPIO Pad Data Out Register MPGPDO0 32-bit Base + 0x0C80
Masked Parallel GPIO Pad Data Out Register MPGPDO1 32-bit Base + 0x0C84
Masked Parallel GPIO Pad Data Out Register MPGPDO2 32-bit Base + 0x0C88
Masked Parallel GPIO Pad Data Out Register MPGPDO3 32-bit Base + 0x0C8C
Masked Parallel GPIO Pad Data Out Register MPGPDO4 32-bit Base + 0x0C90
Masked Parallel GPIO Pad Data Out Register MPGPDO5 32-bit Base + 0x0C94
Masked Parallel GPIO Pad Data Out Register MPGPDO6 32-bit Base + 0x0C98
Masked Parallel GPIO Pad Data Out Register MPGPDO7 32-bit Base + 0x0C9C
Reserved — — Base +
(0x0CA0–0x0FF)
Interrupt Filter Maximum Counter Register IFMC0 32-bit Base + 0x1000
Interrupt Filter Maximum Counter Register IFMC1 32-bit Base + 0x1004
Interrupt Filter Maximum Counter Register IFMC2 32-bit Base + 0x1008
Interrupt Filter Maximum Counter Register IFMC3 32-bit Base + 0x100C
Interrupt Filter Maximum Counter Register IFMC4 32-bit Base + 0x1010
Interrupt Filter Maximum Counter Register FMC5 32-bit Base + 0x1014
Interrupt Filter Maximum Counter Register IFMC6 32-bit Base + 0x1018
Interrupt Filter Maximum Counter Register IFMC7 32-bit Base + 0x101C
Interrupt Filter Maximum Counter Register IFMC8 32-bit Base + 0x1020
Interrupt Filter Maximum Counter Register IFMC9 32-bit Base + 0x1024
Interrupt Filter Maximum Counter Register IFMC10 32-bit Base + 0x1028
Interrupt Filter Maximum Counter Register IFMC11 32-bit Base + 0x102C
Interrupt Filter Maximum Counter Register IFMC12 32-bit Base + 0x1030
Interrupt Filter Maximum Counter Register IFMC13 32-bit Base + 0x1034
Interrupt Filter Maximum Counter Register IFMC14 32-bit Base + 0x1038
Interrupt Filter Maximum Counter Register IFMC15 32-bit Base + 0x103C
Reserved — — Base +
(0x1044–0x107C)
Table B-2. Detailed register map (continued)
Register description Register Name
Used
Size
Address