NXP Semiconductors MPC5606S - Register Map

Register Map
MPC5606S Microcontroller Reference Manual, Rev. 7
1268 Freescale Semiconductor
Interrupt Filter Clock Prescaler Register IFCP 32-bit Base + 0x1080
Reserved — — Base +
(0x1084–0x3FFF)
WakeUp Unit Section 41.4, Memory map and register description 0xC3F94000
NMI Status Flag Register WKPU_NSR 32-bit Base + 0x0000
Reserved — — Base +
(0x0004–0x0007)
NMI Configuration Register WKPU_NCR 32-bit Base + 0x0008
Reserved — — Base +
(0x000C–0x0013)
Wakeup/Interrupt Status Flag Register WKPU_WISR 32-bit Base + 0x0014
Interrupt Request Enable Register WKPU_IRER 32-bit Base + 0x0018
Wakeup Request Enable Register WKPU_WRER 32-bit Base + 0x001C
Reserved — — Base +
(0x0020–0x0027)
Wakeup/Interrupt Rising-Edge Event Enable Register WKPU_WIREER 32-bit Base + 0x0028
Wakeup/Interrupt Falling-Edge Event Enable Register WKPU_WIFEER 32-bit Base + 0x002C
Wakeup/Interrupt Filter Enable Register WKPU_WIFER 32-bit Base + 0x0030
Wakeup/Interrupt Pullup Enable Register WKPU_WIPUER 32-bit Base + 0x0034
Reserved — — Base +
(0x0038–0xFFFF)
eMIOS 0 Section 9.4, Memory map and register description 0xC3FA_0000
EMIOS Module Configuration Register EMIOS0_MCR 32-bit Base + 0x0000
EMIOS Global FLAG Register EMIOS0_GFLAG 32-bit Base + 0x0004
EMIOS Output Update Disable Register EMIOS0_OUDIS 32-bit Base + 0x0008
EMIOS Disable Channel Register EMIOS0_UCDIS 32-bit Base + 0x000C
Reserved — — Base +
(0x0010–0x001F)
eMIOS0 UC0 A Register EMIOS0_UC0_A 32-bit Base + 0x0020
eMIOS0 UC0 B Register EMIOS0_UC0_B 32-bit Base + 0x0024
eMIOS0 UC0 CNT EMIOS0_UC0_CNT 32-bit Base + 0x0028
eMIOS0 UC0 Control Register EMIOS0_UC0_SC 32-bit Base + 0x002C
eMIOS0 UC0 Status Register EMIOS0_UC0_SS 32-bit Base + 0x0030
Reserved — — Base +
(0x0034–0x003F)
Table B-2. Detailed register map (continued)
Register description Register Name
Used
Size
Address