Clock Description
MPC5606S Microcontroller Reference Manual, Rev. 7
196 Freescale Semiconductor
8.4.3.1 Register descriptions
All registers may be accessed as 32-bit words, 16-bit half-words, or 8-bit bytes. The bytes are ordered as
big-endian. For example, the CGM_OC_EN register may be accessed as a word at address 0xC3FE_0370,
as a half-word at address 0xC3FE_0372, or as a byte at address 0xC3FE_0373.
8.4.3.1.1 Output Clock Enable Register (CGM_OC_EN)
This register is used to enable and disable the output clock.
0xC3FE_0390 CGM_AC2_SC R 0 0 0 0
SELCTL
0 0 0 0 0 0 0 0
W
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0394 CGM_AC2_DC0 R
DE0
0 0 0
DIV0
0 0 0 0 0 0 0 0
W
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0398 CGM_AC3_SC R 0 0 0 0
SELCTL
0 0 0 0 0 0 0 0
W
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_039C Reserved
0xC3FE_0400
…
0xC3FE_3FFC
Reserved
Address 0xC3FE_0370 Access: Supervisor read/write, User read-only
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EN
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 8-3. Output Clock Enable Register (CGM_OC_EN)
Table 8-3. MC_CGM Memory map (continued)
Address Name
01232756789101112131415
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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