Clock Description
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 207
Figure 8-16. MC_CGM Auxiliary Clock 2 Generation Overview
Figure 8-17. MC_CGM Auxiliary Clock 3 Generation Overview
8.4.4.2.1 Auxiliary Clock Source Selection
During normal operation, the auxiliary clock selection is done via the CGM_AC0…3_SC registers. If
software selects an unavailable source, the old selection remains, and the register content does not change.
CGM_AC2_DC0 Register
clock divider
eMIOS1 clock
unused
Secondary FMPLL 2
Primary FMPLL 3
div. 16 MHz int. RC osc. 1
CGM_AC2_SC Register
div. 4–16 MHz external oscillator 0
QuadSPI clock
condary FMPLL 2
condary FMPLL / 2 3
stem clock / 2 1
CGM_AC3_SC Register
stem clock 0
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