NXP Semiconductors MPC5746R - Page 16

MPC5746R Hardware Design Guide, Rev. 1
Power Supply
NXP Semiconductors16
3.6.4 Analog module self-test and parameter monitoring
The ADC interface includes connections to the PMC internal voltages for diagnostic purposes. An analog
multiplexer and the buffer are inside the PMC. SAR ADC0 converts the selected voltage, which can then
be evaluated by the CPU. Voltages in the PMC module can be monitored with the ADC and the ADC does
not impact the PMC voltage levels. These signals are used for calibration, diagnostics during test or to
allow the application to actively monitor the signal levels. There is a dedicated ADC channel for these
monitoring purposes.
Table 11 lists all the internal test signals that can be monitored using SAR ADC0.
Table 11. ADC 0 Mux Interface
PMC_ADC_CS[ADC_CHSE] ADC Channel Output Typical Value
6’b000000 ADC Channel Off
6’b011110 por085_c sense value 1.25 V (CORE supply)
6’b011101 por085_c reference value 0.915 V
6’b011100 por098_c sense value 1.25 V (CORE supply)
6’b011011 por098_c reference value 1.01 V
6’b011010 por085_c2 sense value 1.25 V (CORE supply)
6’b011001 por085_c2 reference value 0.905 V
6’b011000 por098_c2sense value 1.25 V (CORE supply)
6’b010111 por098_c2 reference value 0.993 V
6’b010110 lvd_core_cold sense 1.25 V (CORE supply)
6’b010101 lvd_core_cold_reference 1.24 V
6’b010100 lvd_core_hot_sense 1.25 V (CORE supply)
6’b010011 lvd_core_hot_reference 1.21 V
6’b010010 hvd_core_sense 1.25 V (CORE supply)
6’b010001 hvd_core_reference 1.43 V
6’b010000 por260_c divider tap point 2.55 V
6’b001111 por260_c reference 1.2 V
6’b001110 por260_c2 divider tap point 2.55 V
6’b001101 por260_c2 reference 1.2 V
6’b001100 lvd_pmc divider tap point 1.98 V
6’b001011 lvd_pmc reference 1.2 V
6’b001010 hvd600 divider tap point 1.13 V
6’b001001 hvd600 reference 1.2 V
6’b001000 lvd_flash divider tap point 1.31 V
6’b000111 lvd_flash reference 1.2 V
6’b000110 hvd_flash divider tap point 1.13 V