NXP Semiconductors MPC5777M - Page 165

Document revision history
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 165
5 6/2015
Electrical characteristics—I/O pad current specification
Replaced Figure 18 (I/O output DC electrical characteristics definition).
Table 12 (I/O input DC electrical characteristics)
•V
IHAUT
specification: changed min value to 3.8 V.
•V
HYSTTL
: Changed min value to 0.250 V (was 0.275). Removed footnote (“Minimum
hysteresis...”) from min value.
Table 13 (I/O pull-up/pull-down DC electrical characteristics)
• Added “AUTO” and “CMOS” designations to conditions for |I
WPU
| and |I
WPD
|.
•|I
WPU
| specification: changed final condition row to “V
IN
= 0.35*V
DD_HV_IO
” (was “V
IN
=
0.65*V
DD_HV_IO
”).
Table 14 (WEAK configuration output buffer electrical characteristics)
•R
OH_W
specification: changed min value to 520  (was 517).
•R
OL_W
specification: changed min value to 520  (was 517).
Table 15 (MEDIUM configuration output buffer electrical characteristics), Table 16
(STRONG configuration output buffer electrical characteristics), and Table 17 (VERY
STRONG configuration output buffer electrical characteristics)
• Changed specification to t
TPD50-50
and revised row.
Table 16 (STRONG configuration output buffer electrical characteristics)
• Added t
SKEW_S
 specification.
Table 17 (VERY STRONG configuration output buffer electrical characteristics)
• Added I
DCMAX_VS
specification.
Table 18 (EBI pad output electrical specification)
• Removed all specifications in Input Specifications section and changed table title to
“EBI Pad Output Electrical Specifications.”
•t
PD_EBI
: changed parameter to “50% – 50% threshold...” (was “50% - 10% 90%
threshold...”) and changed max value to 4.0 ns (was 5.5).
•R
OH_EBI_GPIO
specification: change min value to 100  (was 150).
Electrical characteristics—Oscillator and FMPLL
Table 21 (PLL0 electrical characteristics)
• Added footnote (“f
PLL0IN
frequency must be...”) to f
PLL0IN
parameter.
• Changed footnote text to “Noise on the V
DD_LV
supply...” (was “VDD_LV noise due...”).
• Added footnote (“PLL jitter is guaranteed when...”) to PLL0PHISPJ|, PLL0PHI1SPJ|, and
PLL0LTJ specifications.
• Added f
PLL0VCOFR
specification.
Table 22 (PLL1 electrical characteristics),
• Added f
PLL1VCOFR
specification.
Table 24 (Selectable load capacitance)
• Significant changes throughout table.
Table 76. Revision history (continued)
Revision Date Description of changes