NXP Semiconductors
AN11744
PN5180 Evaluation board quick start guide
AN11744 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Application note Rev. 1.3 — 2 February 2018
COMPANY PUBLIC 371213 31 / 45
The trigger delay defines the delay between AWG trigger input and the LMA sequence
start. The given 80µs define a standard FDT for type A, if the TX_IRQ signal is taken as
trigger signal.
<Generate Signal From Hex Data> generates the binary as well as the subcarrier
sequence, and automatically loads this sequence and related settings into the AWG.
A simple test can be done:
Step 1: Setup the hardware as shown in Fig 24. Place the Reference PICC close to the
PCD antenna.
Step 2: Setup the AWG in the NFC Cockpit as defined above.
Step 3: Enable the test bus and route TX_IRQ to a test pin (e.g. IRQ pin).
Step 4: Load Protocol with type A 106 and enable the RF Field.
Step 4: Send a single REQA. -> the ATQA should be received properly.
Note: After loading the settings and the sequence into the AWG, the AWG can be
switched to “local control”. This allows a faster direct control for manual tests of e.g. the
trigger delay or the LMA amplitude at the AWG without reloading all the settings again.
4.8.3 AWG setup and test for type B @ 106
The Fig 27 shows a typical setup for a type B response. After connecting the AWG the
type B protocol with 106 kbit/s can be chosen. The sample rate defines the number of
samples per half of a subcarrier cycle.
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