NXP Semiconductors PN544 C2 - Page 167

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 167 of 172
12. List of figures
Fig 1. System Overview ..............................................7
Fig 2. SPI interface configuration ..............................10
Fig 3. I2C interface configuration ..............................11
Fig 4. LLC Frame Components.................................14
Fig 5. HCP packet.....................................................15
Fig 6. HCI packet smaller than maximum packet size
........................................................................16
Fig 7. HCI packet bigger than maximum packet size 16
Fig 8. LLC layer (SHDLC) .........................................17
Fig 9. RSET Frame ...................................................19
Fig 10. LLC RSET frame example ..............................20
Fig 11. Recommended RSET frame...........................20
Fig 12. Baud rate Frame .............................................21
Fig 13. baud rate change flow.....................................22
Fig 14. example of change baud rate LLC frame........23
Fig 15. CRC examples................................................23
Fig 16. Inter-frame-character definition .......................24
Fig 17. PN544 Guard Host Timeout............................25
Fig 18. Sample Transfer Host to PN544 .....................26
Fig 19. Sample transfer PN544 to Host ......................27
Fig 20. HSU Full Duplex Transfer ...............................27
Fig 21. Sample I
2
C Host to PN544 Communication....29
Fig 22. I
2
C PN544 to Host Regular Transfer...............29
Fig 23. I
2
C PN544 to Host Split Transfer ....................30
Fig 24. Sample SPI Host to PN544 Transfer ..............31
Fig 25. Sample SPI PN544 to Host Transfer ..............31
Fig 26. Sample SPI Duplex Transfer...........................32
Fig 27. Type A Reader RF Gate initialization..............42
Fig 28. Gate ‘X’ initialization........................................42
Fig 29. PN544 initialization .........................................43
Fig 30. After First Setup – Default state......................45
Fig 31. PN544 Host Link wake-up...............................55
Fig 32. Clock request with CLKREQ pin, acknowledge
with CLCKACK pin..........................................59
Fig 33. Clock request with CLKREQ pin, acknowledge
with Timeout....................................................59
Fig 34. Clock request with HCI Event, acknowledge with
HCI Event........................................................60
Fig 35. Clock request with HCI Event, acknowledge with
Timeout...........................................................60
Fig 36. Clock request with CLKREQ pin .....................62
Fig 37. Clock request with HCI event..........................63
Fig 38. Clock acknowledge with timeout .....................64
Fig 39. Clock acknowledge with CLKACK pin.............65
Fig 40. Clock acknowledge with HCI event.................66
Fig 41. NFC CLK request in NFC active target mode 67
Fig 43. UICC Type A Card Emulation Example ..........73
Fig 44. UICC Type A Reader Example .......................75
Fig 46. Polling Loop Overview.....................................82
Fig 47. Polling Loop Timings.......................................83
Fig 48. Emulation or Pause Phase..............................86
Fig 49. Emulation Phase only .....................................87
Fig 50. Pause Phase only ...........................................87
Fig 51. Reader Phase only..........................................88
Fig 52. Several Reader Phases ..................................89
Fig 53. Reader Phases and Emulation Phase ............89
Fig 54. Activate Reader Phase Event (Type A example)
........................................................................90
Fig 55. Deactivate Reader Phase Event (Type A
example) .........................................................91
Fig 56. Polling Loop with ISO14443 Type A card
detected ..........................................................92
Fig 57. NFC-WI Off Mode ..........................................97
Fig 58. NFC-WI Wired Mode......................................97
Fig 59. NFC-WI Virtual Mode ......................................98
Fig 60. Activation and communication with a MIFARE
card ...............................................................105
Fig 61. NFC-IP1 Initiator ...........................................118
Fig 62. NFC-IP1 Initiator exchange using
NXP_EVT_NFC_CONTINUE_MI..................119
Fig 63. NFC-IP1 Initiator & Type A reader
(NXP_NFCI_CONTINUE_ACTIVATION) ......121
Fig 64. NFC-IP1 Initiator & TypeF reader
(NXP_NFCI_CONTINUE_ACTIVATION) ......121
Fig 65. NFC-IP1 Target.............................................125
Fig 66. NFC-IP1 TARGET with
NXP_EVT_NFC_CONTINUE_MI..................126
Fig 67. Host as a Type A reader, two Type A cards in
the field..........................................................134
Fig 68. Host as a Type A reader, two Type A cards in
the field..........................................................135
Fig 69. Simplified system view ..................................136
Fig 70. Initialization of PN544 ...................................137
Fig 71. Communication with a card...........................138
Fig 72. Switch to Download mode.............................145
Fig 73. Read PN544 versions ...................................163