NXP Semiconductors PN544 C2 - Page 168

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 168 of 172
13. List of tables
Table 2. Host Interface Selection ....................................8
Table 3. CPOL / CPHA description .................................9
Table 4. Pin functional description ..................................9
Table 5. Physical host Interfaces Overview ..................13
Table 6. SHDLC Control field coding ............................17
Table 7. Type coding of the S-Frames..........................18
Table 8. modifier coding of the U-Frames.....................19
Table 27. PN544 System Management Gate .................45
Table 28. Self test commands ........................................46
Table 29. Antenna Self test Command ...........................47
Table 30. Antenna Self test Command Response ..........47
Table 31. SWP Self test Command Response ...............48
Table 32. Type Approval Test commands ......................48
Table 33. PRBS test Command......................................48
Table 34. PRBS test Command Technology Parameter.48
Table 35. PRBS test Command Bitrate Parameter.........49
Table 36. Autonomous Event..........................................49
Table 37. Information Event............................................49
Table 38. PMUVCC Event ..............................................50
Table 39. EXT_RF_FIELD Event....................................51
Table 40. TEMP_OVERHEAT Event ..............................51
Table 41. R/W Commands..............................................51
Table 42. Read Command..............................................52
Table 43. Read Command Response.............................52
Table 44. Write Command ..............................................52
Table 45. Write Command Response.............................52
Table 47. Setting for set Default mode to Standby..........54
Table 48. Setting for notification .....................................56
Table 49. Setting for external oscillator...........................57
Table 50. Setting for external oscillator...........................58
Table 51. Supported Clock Setup ...................................58
Table 52. Setting for no clock request.............................61
Table 53. Setting for clock request with CLKREQ pin.....61
Table 54. Setting for clock request with HCI event .........62
Table 55. Setting for clock acknowledge with timeout.....63
Table 56. Setting for clock acknowledge with CLKACK pin
........................................................................64
Table 57. Setting for clock acknowledge with HCI event 65
Table 58. SWP Management Gate .................................68
Table 59. SWP Events....................................................68
Table 60. SWP Switch Mode Event ................................68
Table 61. SWP Switch Mode Event Parameters.............69
Table 65. Polling Loop Management Gate......................78
Table 66. Polling Loop events.........................................78
Table 67. NXP_EVT_CLK_REQUEST parameter ..........78
Table 68. Status values ..................................................79
Table 69. NXP_EVT_ACTIVATE_RDPHASE Event
Parameters......................................................79
Table 70. Technology Description...................................79
Table 72. NfcWiMgt gate.................................................95
Table 73. NFC-WI Events ...............................................95
Table 74. NXP_EVT_SE_SWITCH_MODE Event
Parameters......................................................95
Table 75. Mode Description ............................................96
Table 76. NFC-WI Registry .............................................96
Table 77. NXP_MIFARE_RAW Command .....................99
Table 78. NXP_MIFARE_RAW Parameters ...................99
Table 79. NXP_MIFARE_RAW Response parameters.100
Table 80. NXP_MIFARE_CMD Command....................100
Table 81. NXP_MIFARE_CMD Parameters..................100
Table 82. Cmd Description............................................101
Table 83. NXP_MIFARE_CMD Response parameters .102
Table 84. Response Code RF Error Description...........102
Table 85. MIFARE Authenticate Command ..................102
Table 86. MIFARE Authenticate command ...................102
Table 87. MIFARE Authenticate command –
Authentication type value ..............................103
Table 88. NXP_MIFARE_AUTHENTICATE_CMD
Command Response ....................................103
Table 89. MIFARE Command .......................................103
Table 90. NXP_WRA_CONTINUE_ACTIVATION
Command Response ....................................103
Table 91. MIFARE Registry ..........................................104
Table 92. Type F Reader RF gate.................................107
Table 93. NXP_FELICA_RAW Command ....................107
Table 94. NXP_FELICA_RAW Parameters .................107
Table 95. FeliCa Raw Response parameters ...............108
Table 96. NXP_FELICA_CMD Command.....................108
Table 97. NXP_FELICA_CMD Parameters...................108
Table 98. FeliCa Command Description .......................108
Table 99. FeliCa Command Response .........................109
Table 100. FeliCa Registry..............................................109
Table 101. Jewel reader RF gate....................................110
Table 102. NXP_JEWEL_RAW_CMD Command ...........110
Table 103. NXP_JEWEL_RAW_CMD Parameters .........110
Table 104. Jewel Command Description For Classic Jewel
Card (bit 4 of HRO = 0) .................................110
Table 105. Jewel Command Description For NDEF Card
(bit 4 of HRO = 1)..........................................112
Table 106. Jewel Raw Command Response ..................113
Table 107. ISO15693 reader RF gate .............................113
Table 108. Reader ISO15693 Command........................113
Table 109. Reader ISO15693 Command Parameters ....114