PN7462 family Quick Start Guide - Development Kit
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© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.6 — 14 May 2018
319816
3.2 Host interface configuration
The PN7462AU supports interfacing one out of the four different host: USB 2.0 full speed
with USB 3.0 hub connection capability, HSUART for serial communication, supporting
standards speeds from 9600 bit/s to 115200 bit/s, and faster speed up to 1.288 Mbit/s,
SPI with half duplex and full duplex capability with speeds up to 7 Mbit/s and I2C
supporting standard mode, fast mode and high-speed mode with multiple address
support.
The PN7462AU connects to host through four pads with alternate function: ATX_A,
ATX_B, ATX_C and ATX_D. The ATX pads are routed at the JP32 10-pin header,
according the following table:
Table 3. PN7462 HIF pins
HSU_RTS_N/SPI_MISO/USB_DP
HSU_CTS_N/SPI_MOSI/USB_DM
3.2.1.1 USB Host Interface configuration
The yellow marked jumpers on the following picture shows how the board needs to be
set for using the USB host interface of the chip. The USB micro connector X3 is located
in the lower right corner of the board.
Fig 18. Host Interface selection – USB mode
3.2.1.2 I2C Host Interface configuration
The yellow marked jumpers (Fig 18) needs to be set for using the I2C host interface of
the chip with LPCXpresso expansion board. This will connect the I²C SCL of the
PN7462AU to the I/O P0 (28) and also the I²C SDA of the PN7462AU to the I/O P0(27) of
the LPCXpresso board.
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