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NXP Semiconductors PN7462AU - No-RTOS Management

NXP Semiconductors PN7462AU
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NXP Semiconductors
UM10883
PN7462 family Quick Start Guide - Development Kit
UM10883
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.614 May 2018
319816
88 of 120
Fig 86. PN7462AU phExMain sequence diagram for non-standby scenario with RTOS
9.2.18 No-RTOS management
In case of No-RTOS the entry point from flash boot is phExMain_NoRTOS. The
functionality remains the same except that the CLIF example and the CT examples are
called from a single executive while loop based on timer interrupt or external RF
detection or CT presence interrupt.

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