NXP Semiconductors PXN2020 - Page 1011

Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 31-21
The structure of the LIN frames in normal polarity is shown in Figure 31-15.
Figure 31-15. LIN Byte Field Format
The structures of the supported SCI frame formats with 8 payload bits are shown in Figure 31-16.
Figure 31-16. SCI Frame Formats (8 Payload Bits)
The structures of the supported SCI frame formats with 9 payload bits are shown in Figure 31-17.
Figure 31-17. SCI Frame Formats (9 Payload Bits)
The structures of the supported SCI frame formats with 2 stop bits in normal polarity are shown in
Figure 31-18. This frame format is supported for reception only.
Figure 31-18. SCI Frame Formats (2 Stop Bits)
Table 31-16. Supported Data Frame Formats for RX only
Control Frame Content
eSCI_CR3 eSCI_CR1
Start
Bits
Payload Bits
Stop
Bits
M2 M PE WAKE
Character
Bits
Address
Bits
Parity
Bits
SCI frames (2 stop bits) (see Figure 31-18)
101018012
11101120 1 2
BIT0
START
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6
BIT7
BIT0
START
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6
BIT0
START
BIT
ADDR
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6
BIT7
BIT0
START
BIT
PARITY
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6
BIT0
START
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6 BIT7
BIT0
START
BIT
ADDR
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6 BIT7
BIT8
BIT0
START
BIT
PARITY
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6 BIT7
BIT0
START
BIT
PARITY
BIT
STOP
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 BIT10 BIT11
BIT0
START
BIT
PARITY
BIT
STOP
BIT
STOP
BIT
BIT1
BIT2 BIT3 BIT4 BIT5 BIT6 BIT7