NXP Semiconductors PXN2020 - 6.2.2.2 RTC Control Register (CRP_RTCC)

Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
6-6 Freescale Semiconductor
6.2.2.2 RTC Control Register (CRP_RTCC)
The CRP_RTCC register contains:
• RTC counter enable
• RTC interrupt enable
• RTC clock source select
• RTC compare value
•API enable
• API interrupt enable
• API compare value
EN128KIRC Enable 128 kHz IRC Oscillator. The EN128KIRCbit enables the 128 kHz IRC oscillator.
0 128 kHz IRC disabled.
1 128 kHz IRC enabled.
Note: After enabling the128 kHz IRC, software needs to wait the required crystal startup/stabilization time
before making use of this oscillator.
EN32KOSC Enable 32 kHz Oscillator. The EN32KOSC bit enables the 32 kHz XTAL oscillator.
0 32 kHz OSC disabled.
1 32 kHz OSC enabled.
Note: After enabling the 32 kHz OSC, software needs to wait the required crystal startup/stabilization time
before making use of this oscillator.
ENLPOSC Enable Low Power External Oscillator. The ENLPOSC bit controls how the 4 – 40 MHz OSC behaves during
sleep if EN40MOSC is high. If EN40MOSC is low, then ENLPOSC has no effect.
0 4 – 40 MHz OSC clock disabled to save power, but connection to the external crystal is still active thus
supports faster recovery time for availability of 4 – 40 MHz OSC after sleep recovery. Supports full 4 – 40
MHz range of external crystals.
1 4 – 40 MHz OSC clock active and may be used as clock source for RTC/API. The external crystal
frequency is limited to  8MHz.
EN40MOSC Enable 4 – 40 MHz Oscillator Enable. The EN40MOSC bit enables the 4 – 40 MHz OSC external oscillator
for external crystal.
0 4–40MHz OSC disabled.
1 4 – 40 MHz OSC enabled.
Note: During sleep mode with EN40MOSC = 1, the 4 – 40 MHz OSC still can actively drive an external
crystal and can be used to clock the RTC/API if the crystal frequency is  8MHz.
TRIM128IRC Trim Value for 128 kHz IRC. The TRIM128IRC bits are a 2’s complement trimming method, so the trimming
code increases from –16 to +15. The default trimming code is 0b11111 (–1, nearly in the middle of –16
and +15). As the code increases/decreases the frequency reduces/increases. TRIM128IRC can only be
updated if IRCTRIMEN is enabled.
TRIMIRC Trim Value for 16 MHz IRC. The TRIM16IRC bits are a 2’s complement trimming method, so the trimming
code increases from –32 to +31. The default trimming code is 0b111111 (–1, nearly in the middle of –32
and +31). As the code increases/decreases the frequency reduces/increases. TRIM16IRC can only be
updated if IRCTRIMEN is enabled.
Table 6-2. CRP_CLKSRC Field Descriptions (continued)
Field Description