NXP Semiconductors PXN2020 - Page 209

System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 8-27
Offset: SIU_BASE + 0x0610–SIU_BASE+0x0698 Access: User read/write
0123456789101112131415
R0000000
PDO
16
0000000
PDO
17
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0000000
PDO
18
0000000
PDO
19
W
Reset0000000000000000
Figure 8-17. GPIO Pin Data Out Register 16–19 (SIU_GPDO16_19)
Table 8-17. SIU_GPDOn Field Descriptions
Field Description
PDOn Pin Data Out. Stores the data to be driven out on the external GPIO pin
associated with the register. If the register is read, it returns the value written.
0V
OL
driven on the external GPIO pin when the pin is configured as an output.
1V
OH
driven on the external GPIO pin when the pin is configured as an output.
Table 8-18. Pin Data Output Register to Pin Mapping
SIU_GPDOn Address Offset Pins
16_19
20_23
24_27
28_31
0x0610
0x0614
0x0618
0x061C
PB0–PB3
PB4–PB7
PB8–PB11
PB12–PB15
32_35
36_39
40_43
44_47
0x0620
0x0624
0x0628
0x062C
PC0–PC3
PC4–PC7
PC8–PC11
PC12–PC15
48_51
52_55
56_59
60_63
0x0630
0x0634
0x0638
0x063C
PD0–PD3
PD4–PD7
PD8–PD11
PD12–PD15
64_67
68_71
72_75
76_79
0x0640
0x0644
0x0648
0x064C
PE0–PE3
PE4–PE7
PE8–PE11
PE12–PE15
80_83
84_87
88_91
92_95
0x0650
0x0654
0x0658
0x065C
PF0–PF3
PF4–PF7
PF8–PF11
PF12–PF15
96_99
100_103
104_107
108_111
0x0660
0x0664
0x0668
0x066C
PG0–PG3
PG4–PG7
PG8–PG11
PG12–PG15