Enhanced Modular Input/Output Subsystem (eMIOS200)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 28-29
28.4.1.1.6 Double Action Output Compare (DAOC) Mode
In the DAOC mode the leading and trailing edges of the variable pulse-width output are generated by
matches occurring on comparators A and B, respectively.
When the DAOC mode is first selected (coming from GPIO mode) both comparators are disabled.
Comparators A and B are enabled by updating registers A1 and B1 respectively and remain enabled until
a match occurs on that comparator, when it is disabled again. In order to update registers A1 and B1, a
write to A2 and B2 must occur and the OU[n] bit in EMIOS_OUDR must be cleared.
The output flip-flop is set to the value of EDPOL when a match occurs on comparator A and to the
complement of EDPOL when a match occurs on comparator B.
MODE[6] controls if the FLAG is set on both matches or on the second match only (see Table 28-11 for
details).
If subsequent enabled output compares occur on registers A1 and B1, pulses continue to be generated,
regardless of the state of the FLAG bit.
At any time, the FORCMA and FORCMB bits allow the software to force the output flip-flop to the level
corresponding to a comparison event in comparator A or B, respectively. The FLAG bit is not affected by
these forced operations.
NOTE
If registers A1 and B1 are loaded with the same value, the unified channel
behaves as if a single match on comparator B had occurred, i.e., the output
pin is set to the complement of EDPOL bit and the FLAG bit is set.
Figure 28-24 and Figure 28-25 show how the unified channel can be used to generate a single output pulse
with FLAG bit being set on the second match or on both matches, respectively.
Figure 28-24. Double Action Output Compare with FLAG Set on the Second Match
Selected
Counter Bus
FLAG
Set Event
A1 Match
0xxxxxxx 0x001000 0x001000 0x001000
Notes:
1
EMIOS_CADR[n] = A1
2
EMIOS_CBDR[n] = B1
B1 Match B1 Match
0xxxxxxx 0x001100 0x0011000x001100
A1 Match
Update to
A1 & B1
Output
Flip-Flop
A1 Value
1
B1 Value
2
A2 = A1 according to OU[n] bit
B2 = B1 according to OU[n] bit
0x000500 0x001000 0x001100 0x001000 0x001100