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NXP Semiconductors PXN2020 - 30.3.2.12 DSPI DSI Alternate Serialization Data Register (DSPI_ASDR)

NXP Semiconductors PXN2020
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Deserial – Serial Peripheral Interface (DSPI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 30-25
The DSPI_SDR is a 32-bit register. The upper 16 bits are only used when TSB is enabled. For non-TSB
configurations, only the least 16 significant bits are used.
30.3.2.12 DSPI DSI Alternate Serialization Data Register (DSPI_ASDR)
The DSPI_ASDR provides a means for host software to write the data to be serialized. When the TXSS
bit in the DSPI_DSICR is set, the data in the DSPI_ASDR is the source of the serialized data. Writes to
the DSPI_ASDR take effect on the next frame boundary.
The DSPI_ASDR is a 32-bit register. The upper 16 bits are only used when TSB is enabled. For non-TSB
configurations, only the least 16 significant bits are used.
Offset: DSPI_BASE + 00C0 Access: Read
0123456789101112131415
R SER_DATA
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R SER_DATA
W
Reset0000000000000000
Figure 30-13. DSPI DSI Serialization Data Register (DSPI_SDR)
Table 30-19. DSPI_SDR Field Description
Bits Description
SER_DATA Serialized Data. The SER_DATA field contains the signal states of the Parallel Input signals.
Offset: DSPI_BASE + 0x00C4 Access: User read/write
0123456789101112131415
R
ASER_DATA
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ASER_DATA
W
Reset0000000000000000
Figure 30-14. DSPI DSI Alternate Serialization Data Register (DSPI_ASDR)

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