NXP Semiconductors QorIQ LS1043ARDB - LS1043 A Processor Block Diagram

Table 1-3. LS1043ARDB features (continued)
LS1043ARDB feature Specification Description
Power One dedicated programmable
regulator supplying the LS1043A
core and DDR power domains.
Power supply details for the LS1043ARDB are given below:
• 1.0 V for core VDD, USB_SVDD, and USB_SDVDD
• 1.2 V for GVDD
• 1.8 V for LS1043A PROG_SFP and PROG_MTR
(POVDD)
• 3.3 V / 1.8 V for CPLD
• 1.35 V for XVDD
• 1.0 V for S1VDD
• 1.8 V for LS1043A general I/O
• 3.3 V for UART/I2C
• 3.3 V for USB HVDD
• 0.6 V for DDR4 VTT/VREF
• 3.3 V / 1.8 V for eSDHC
• 1.0 V for security monitor (TA_BB_VDD)
NOTE:
For core VDD, USB_SVDD, USB_SDVDD, and
TA_BB_VDD, the LS1043A processor supports 1.0
V as well as 0.9 V; however, the LS1043ARDB
only supports 1.0 V.
1.4 Block diagrams
The figure below shows the LS1043A processor block diagram.
Block diagrams
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
12 NXP Semiconductors