NXP Semiconductors QorIQ T1040 - Chapter 2 Architecture; 2.1 Processor

Chapter 2
Architecture
This section explains:
• Processor
• Power
• Clocks
• Reset
• DDR
• SerDes port
• Ethernet controllers
• Ethernet management interface
• I2C
• SPI interface
• Local bus
• SDHC interface
• USB interface
• Serial port
• SLIC/SLAC and TDM interface
• JTAG/COP port
• Connectors, headers, jumper, push buttons and LED
• Temperature
• DIP switch definition
2.1 Processor
The T1040RDB supports as many features of the T1040 as possible, as detailed in the
following sections. The T1040RDB supports this by isolating OVDD-powered signals
through external translation devices or the CPLD wherever required.
QorIQ T1040 Reference Design Board User Guide, Rev. 0, 06/2015
Freescale Semiconductor, Inc. 13