Onkyo FR-155 - CD 4-Channel BTL Driver & RDS Decoder Diagrams; Q102: LA6541 D Pin Descriptions; Q171: BU1923 RDS Decoder

FR-155
12
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Level shift
4
BTL AMP
4
Level shift
1
BTL AMP
1
BTL AMP
3
BTL AMP
2
Level shift
3
Level shift
2
RESET
Regulator
Pin No. Pin Name Description
(Function)
VCC
Power supply (shorted with pin 30)
Mute ON/OFF control for all BTLAMP outputs
VIN1
BTL AMP 1 input
VG1 BTL AMP 1 input (for gain control)
BTL AMP 1 output (non-inverting side)
BTL AMP 1 output (inverting side)
GND GND (minimum electric potential)
GND GND (minimum electric potential)
GND GND (minimum electric potential)
V
O
3 BTL AMP 2 output (inverting side)
V
O
4 BTL AMP 2 output (non-inverting side)
VG2 BTL AMP 2 input (for gain control)
V
IN
2 BTLAMP 2 input
REG OUT Connection for collector of external transistor (PNP); 5 V supply output
REG IN Connection for base of external transistor (PNP)
RES
Reset output
C
D
Reset output delay time setting (with capacitor)
V
IN
3 BTLAMP 3 input
VG3 BTL AMP 3 input (for gain control)
V
O
5 BTL AMP 3 output (non-inverting side)
V
O
6
BTL AMP 3 output (inverting side)
GND GND (minimum electric potential)
GND GND (minimum electric potential)
GND GND (minimum electric potential)
V
O
7 BTL AMP 4 output (inverting side)
V
O
8 BTL AMP 4 output (non-inverting side)
VG4 BTL AMP 4 input (for gain control)
V
IN4
BTL AMP 4 input
V
REF
Reference voltage input for level shift circuit
V
CC
Power supply (shorted with pin 1)
Vcc
Vref
VIN4
VG4
Vo8
Vo7
GND
GND
GND
Vo6
Vo5
VG3
VIN3
CD
RES
Vcc
Mute
VIN1
VG1
Vo1
Vo2
GND
GND
GND
Vo3
Vo4
VG2
VI2
Reg OUT
Reg IN
Q102:LA6541D (CD 4-channel BTL Driver )
+
(4)
(3)
(5)
(6)
(12)
(11)
(16)
(1)
(2)
(10)
(9)
Measurement
circuit
Differential
decoder
Bi-phase
decoder
PLL
1187.5Hz
PLL
57kHz
RDS/ARI
Reference
clock
(13) (14)
(7)
(8)
120k
100k
100k
Analog
Power supply
Digital
power supply
anti-aliasing
filter
8ch Switched
capacitor filter
Comparator
RCLK
QUAL
RDATA
T2T1
XO
X1
VSS2
VDD2
VSS1
VDD1
VREF
MUX
VSS3
CMP
Pin name
Demodulator quality
Demodulator data
Reference voltage
Input
Analog power supply
GND
Comparator input
Test input
Digital power supply
Crystal oscillor
-
Demodulator clock
Function
Good data : High , bad data : Low
Refer to output data trimming
1/2 VDD1 (refer to input/output circuits)
Composite signal input
4.5V to 5.5V
-
C-junction
Open or connected to ground
4.5V to 5.5V
Connects to 4.332MHz oscillator
(refer to input/output circuit)
-
1187.5Hz clock
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
QUAL
RDATA
Vref
MUX
VDD1
Vss1
Vss3
CMP
T2
T1
VDD2
Vss2
XI
XO
(NC)
RCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Vo1
Vo2
Q171:BU1923(RDS Decoder)