Onkyo TX-SR701 - Additional Audio Adjustments; Front Expander function; Virtual Surr Level adjustment; Dialog Enhance function

TX-SR701/E
MAIN MICROPROCESSOR
TERMINAL DESCRIPTION
No. S
y
mbol I/O Descri
p
tion
51 DSP1BST O Boot stra
p
out
p
ut
p
in for first DSP IC.
52 ~DSP1HCS O Serial communication clock out
p
ut
p
in for Q302 and Q310.
53 ~DSP1HACN I Acknowled
g
e in
p
ut
p
in for first DSP IC.
54 DSP1GP8 O PCM information out
p
ut
p
in for first DSP IC.
55 BVdd Power su
pp
l
y
p
in
(
3.3V
)
56 BVss Ground
p
in
57 DSP1GP9 I Information in
p
ut
p
in to read bit stream information of first DSP IC.
58 GSP1GP10 I Interru
p
ter re
q
uest in
p
ut
p
in for first DSP IC
59 ~DSP2RST O Reset si
g
nal out
p
ut
p
in for second DSP IC Q703.
60 DSP2BST O Boot stra
p
out
p
ut
p
in for second DSP IC.
61 ~CODECRST/~DSPP
M
O Reset out
p
ut
p
in for DIR IC and initializin
g
of PLL of DSP IC
62 ~DSP2HACN I Acknowled
g
e in
p
ut
p
in for second DSP IC.
63 DSP2HDOUT I Serial communication data in
p
ut
p
in for second DSP IC
64 ~DSP2HCS O Serial communication clock out
p
ut
p
in for second DSP IC
65 ~ADPD O Power down out
p
ut
p
in for AD converter Q113,4.
66 ADCDIV O Dividin
g
control out
p
ut
p
in for AD converter
67 V
pp
EN O Self-write
p
ower su
pp
l
y
control
p
in
68 SPZ2 O S
p
eaker rela
y
control out
p
ut
p
in for zone 2
69 SPCS O S
p
eaker rela
y
control out
p
ut
p
in for center and surround channels
70 SPF O S
p
eaker rela
y
control out
p
ut
p
in for front channels
71 Avdd Power su
pp
l
y
p
in
(
5V
)
72 Avss Ground
p
in
73 Avref Reference volta
g
e
p
in for A/D converter
74 VOLH I Out
p
ut volta
g
e detection in
p
ut
p
in of
p
ower am
p
lifier
75 ~SD I Broadcast detection in
p
ut
p
in
76 ~STEREO I Stereo broadcast detection in
p
ut
p
in
77 INIT1 I Initializin
g
p
in
78 INIT2 I Initializin
g
p
in
79 INIT3 I Initializin
g
p
in
80 INIT4 I Initializin
g
p
in
81 PROTECT I Abnormal current and volta
g
e detection in
p
ut
p
in
82 THRM I Thermal detection in
p
ut
p
in
83 SDET I S video detection in
p
ut
p
in
84 RDSDA I Data in
p
ut
p
in from RDS decoder
85 RDSID I Si
g
nal in
p
ut
p
in from RDS decoder
86 SYNC I External s
y
nchronizin
g
j
ud
g
ment in
p
ut
p
in from OSD IC
87 ~VSYNC I Vertical s
y
nchronizin
g
si
g
nal in
p
ut
p
in
88 ~POFF I Power failure detection in
p
ut
p
in
89 ~RDSCLK I Clock in
p
ut
p
in from RDS decoder
90 ~IRIN I IR si
g
nal in
p
ut
p
in
91 ~IRZ2 I IR si
g
nal in
p
ut
p
in for zone 2
92 SEC1H O Power su
pp
l
y
control out
p
ut
p
in for
p
ower am
p
lifier
93 SUBRDY I Read
y
in
p
ut
p
in for sub-micro
p
rocessor
94 SUBSDI I Serial communication data in
p
ut
p
in for sub-micro
p
rocessor
95 SUBSDO O Serial communication data out
p
ut
p
in for sub-micro
p
rocessor
96 SUBCLK O Serial communication clock out
p
ut
p
in for sub-micro
p
rocessor
97 232RXD I Not used.
98 232TXD O Not used.
99 ~SUBRST O Reset out
p
ut
p
in for sub-micro
p
rocessor
100 YCSEPDA O Not used.
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