PacComm TINY-2 - Hardware Overview

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HARDWARE

DESCRIPTION

Detailed

Circuit

Description

HARDWARE

DESCRIPTION

This

section

includes

detailed

hardware

specifications

and

a

functional

description

of

the

hardware

design

of

the

TINY-2

and

MICROPOWER-

2

packet

controllers.

Specifications

apply

to

both

packet

controller

models

unless

specified

otherwise.

MICROPOWER-2

specifications

(when

different)

will

be

placed

in

square

brackets

[

}.

Firmware

specifications

and

operating

instructions

are

contained

in

the

Operat-

ing

Manual.

LEDs

PWR

:

The

POWER

LED

is

illuminated

whenever

the

TINY-2/MICRO-2

is

connected

to

a

power

source

and

the

power

switch

is

on.

CON

The

CONNECT

LED

illuminates

when

an

AX.25

connection

exists

on

the

selected

stream

for

that

port.

(See

multiconnection

explanation

in

;

Operating

Manual).

STA

The

STATUS

LED

illuminates

whenever

an

AX.25

frame

has

been

sent

but

not

yet

acknowledged.

If

a

connection

is

to

be

terminated

(DIS-

CONNECTED)

and

the

STA

LED

is

lit,

some

frames

which

were

sent

but

not

acknowledged

may

be

lost.

pqr

The

PTT

LED

illuminates

whenever

the

TINY-2/MICRO-2

activates

the

radio

keying

line.

pcD

The

DCD

LED

illuminates

when

the

modem

senses

a

signal.

Detailed

Circuit

Description

¢

Oscillator:

The

crystal,

capacitors

and

resistors

in

the

74HC4060

(U7)

circuit

provide

for

a

stable

clock

source

for

the

4.9152

MHz

master

clock.

The

74HC4060

also

provides

all

baud

clocks

(X16)

and

a

600HZz

signal

for

the

real

time

clock

interrupt

applied

to

the

SIO

(U14)

SYNC-B

input.

«CPU

Complex:

The

microprocessor

(U1)

is

an

NMOS

Z-80

(8400-06)

[CMOS,

84C00-06].

Both

asynchronous

serial

and

HDLC

junctions

are

performed

by

a

Z80

SIO/0

(8440-06)

[84C40-06]

(U14).

The

27256

[270256]

EPROM

(32k

bytes)

(U2)

contains

all

the

firmware,

addressed

from

0

to

7FFF.

The

32k

x

8

RAM

(U8)

holds

all

buffered

data

and

battery

backed

parameters

for

the

8400-06

[84C00-06](Z-80)

CPU

(U1).

RAM

is

addressed

from

8000

to

FFFF.

Each

memory

device's

chip

select

is

provided

by

the

74HC139

decoder

(U3),

and

the

RAM

chip

select

is

also

buffered

bya

er

failure

detection

circuit.

When

voltage

is

low

or

removed,

the

RAM

enters

low

power

mode,

drawing

approximately

one

microamp

while

retaining

memory

contents.

i

TINY-2/MICRO-2

Technical

Ref.,

2

Ed

©

1989,

PacComm,

Inc.

9

Other manuals for PacComm TINY-2

Technical Reference Manual29 pages