Panasonic CQ-DF783U - Page 12

Pin
No.
Port Descriptions I/O (V)
38 - - - -
39 - - - -
40 DVSS2 GND - 0
41 CLK C
M
AUDIO bit clock input I 1.6
42 SCK Clock input I 3.3
43 LRCK
C M
AUDIO L/R identifying
signal input
I 1.6
44 CDFS Serial frame sink signal
input
I 2.6
45 DATA
M C
AUDIO serial data input I 1.6
46 - - - -
47 SI Serial data input I 0
48 CLK M
C
AUDIO bit clock output O 1.6
49 SCK Clock input I 3.3
50 CVSS6 GND - 0
51 - - - -
52 CVDD3 CORE CPU system (1.6V)
power supply
- 1.6
53 LRCK
M C
AUDIO L/R identifying
signal output
O 1.6
54 CDFS Serial frame sink signal
input
I 2.4
55 - - - -
56 DVDD3 I/O system (3.3V) power
supply
- 3.3
57 DVSS3 GND - 0
58 REST
SW
Mechanics deck REST SW
input
I 3.3
59 DATA
M C
AUDIO serial data output O 1.6
60 SO Serial data output O 1.2
61 - - - -
62 - - - -
63 - - - -
64 - - - -
65 - - - -
66 BLKCK Subcode block clock pulse
input
I 0
67 - - - -
68 DVDD4 CORE CPU system (1.6V)
power supply
- 1.6
69 SW1 Mechanics deck SW1 input I 0
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