Panasonic RX-DT505 - IC601 (MND2410 RUJ) Terminal Functions

RX-DT505 RX-DT505 |
©(C706 (MN6626)
em Mark , HC Function Pin Mark : Vo Function
No. Division | No. Division
i i: -
1 AVSS — Ground 36 | SUBQ ie) Sub-code (Q data) output
2 | IREF | | Reference current input 37 sack | Sub-code (Q data) clock input
f=7.3 kHz
iit 3 ARF | RF signal input + 4
za 7 T : 38 | /CLDCK — —
4 DRF | DSL bias input 1 t +
output |
| 39 BLKCK O Sub-code block (Q data) clock
5 DSLF oO DSL loop filter ‘ f=75 Hz
T “T +- +
linput 6 PLLF | | | PLL loop filter 40 | DEMPH O De-emphasis ON signal output
input 7 AVDD | | Power supply (+5 V input) 41 MEMP I Enphasis signal input
8 RSEL | +5 V input 42 MLD Command load signal input
9 TBUS7 43 MCLK | Command clock signal input
put
! ! — Test terminal (Ground) + +
output 16 TBUSO 44 MDATA | Command data input
ft 4
Reset) 17 FLAG 45 DMUTE | Muting control signal input
344 MHz) 18 | IPFLAG 46 SMCK O Clock output (f=4.2336 MHz)
19 FCLK _ — 47 STAT O Status signal output
cca [| —— +
20 BTYCK 48 CRC son —.
——— + +
21 WDCK 49 SUBC | _ ——
}- + + +
22 /RST I Reset signal input 50 SBCK | Clock for sub-code serial output
fo t——_}——— +— +
Digital audio interface signal 51 /TRON | Tracking servo ON signal input
23 TX oO output ule | es ee
{____,____.. 52 CLVS ie) Spindle servo signal output
24 LDG fart aao= Hook Pa | = oe fa
_ — 53 PC —
S pee Vs indi t trol {
nal input ——-+4 + 4 ECM 0 pindle motor control signa
26 SRDATA @) Serial data output ? c output
+. $$ — {____.
stment ; ; 7
27 SCK ie) Serial bit clock output Spindle motor control signal
55 ECS O
pa ee oe output
it 28 LRCK Oo Clock output po +
as eee OT | (i eee EL 56 VDD | Power supply (+5 V input)
29 XCK (@) Clock output (f= 16.9344 MHz) b + } +
f T t T 57 /TEST | +5 V input
30 PMCK — _—_— +
7 58 SSEL | +5 V input
31 CSEL | +5 V input
——__—--—_ 1 59 MSEL _ _—
32 PSEL = Ground t-
r | 60 RESY _ —
33 x1 | Clock input (f= 16.9344 MHz) +
|
61
DO
I
Drop
out
signal
input
34 x2 — — 7 7
tT 62 EFM
35
VSS
_
Ground
}
|
—________
- 63 PCK — —
64 PDO
jal input
put
44 MHz)
~58-
e1C601 (MND2410RU4J)
RX-DT505
AD converter signal input
(Operation switch)
oD Mark ; uO Function in Mark P ue Function
No. Division No. Division
: yon | roy 31 ee | Remote control signal input
2 OSC1 O Clock output (4 MHz)
1 32 BLKCK | Sub code block clock input
3 OSC2 1 Clock input (4 MHz)
T 33 STATUS | CD status signal input
4 VSS — GND
T 34 | CD RESET | CD reset signal input
5 Xl | Clock input (32 kHz) +
+ 35 RST | System reset signal input
6 XO O Clock output (32 kHz)
CD signal process strove signal
7 VREE- AD converter reference voltage 36 MLD O input
(GND)
37 MDATA O CD signal process data input
8 ADIN7 | AD converter signal input
(Tape deck switch) 38 MCLK O CD signal process clock signal
input
9 ADING AD converter signal input — +~
(Tape deck switch) 39 CLDCK O CD sub-code clock output
Tr
10 ADINS AD converter signal input 40 SUBQ \ CD sub-code data input
(Tape deck switch)
41 —— = paereet
MBP1 Fre
O Beat proof control signal output 42 _— + =< ae aie:
MBP2 Tt
43 CM — GND
ADIN2 AD converter signal input
(Deck operation switch) 44 TLOCK | CD tracking signal input
po pe eS Se
AD converter signal input 45 FLOCK | CD focus lock signal input
CD operation switch
CD osieer wy CD REST seen!
46 SW | Rest switch signal input
a es ee
output
— 59 -—
47 CD OPEN | Disc tray open detection switch
AD converter reference Voltage Sw signal input
VDD
( CD CLOSE Disc tray close detection switch
48 | f ;
SW signal input
Jog dial signal input
g g P 49 SENSE | CD sense signal input
O Beep signal output 50 | REMSTBY | Remote control sensor power
+ control
Electric volume control signal
oO output 51 POWER DET| I Power detection signal input
r
MKDATA Oo Deck control data output 52
2 —_— §=—= et
MKCLK O Deck control clock output 55
AGCLK1 oO Audio signai control clock output 56 STEREO | PLL tuner stereo signal input
AGDATA oO Audio signal control data output 57 TUNE | PLL tuner tuning signal input
PLL CL oO PLL tuner clock signal output 58, 59/DES1,DES2} —— ——
poe O Power supply circuit control a SrRet
CONT PPly Q t 10) LCD segment signal output
93 SEGO
MUTE O Muting control signal output
94~| COM3~ 0 Saal
PLLCE PLL tuner strove signal output 97 | COMO LCD common signal output
+—
AGCLK2 Audio signal control signal contro! 98~| VLC3~ .
} 100 VLC4 \ LCD bias reference voltage input
PLL DI O PLL tuner control data signal