TH-103PF10WK/TK/RK
80
9.14. D-Board (2 of 2) Block Diagram
CLRU1
PCU1
LEU1
SOS6_SC1
ODEU1
FREE_RUN
CLKM_IN
PCD6
ODED6
CLRD6
LED6
CLKD2
CLKD1
CLRD5
PCD5
LED5
CLKD3
ODED5
CLKD0
LEU2
PCU2
CLRU2
CLKU1
CLKU0
ODEU2
CLKU3
CLKU2
CLKU3
CLKU2
CLKU1
CLKU0
CLKD0
CLKD1
CLKD3
CLKD2
LED
SOS7_DRV
X9500
TP9681
TP9533
B 10bit
st-r
IC9400
CONVERTER
XRST
CTI/TINT
WB-ADJ
I/P
CONVERTER
COLOR
XRST2
SFVRST
LATCH
CONTRAST
FORMAT
SFRST
Video DATA 48bit DA00-DC11<D/R>
FORMAT CONVERTER/RGB PROCESSOR<R>
IC9401
DATA
ROMDATA00-03 DA14,DA15-DC15<R>
DDR SDRAM<R>(128M)
PCK OCK
SUB-FIELD
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<R>
R 10bit
JTAG
DCK
R 10bit
ROMDATA04-15 UA12-UC15<R>
PLASMA AI
G 10bit
NEW
DRVCLKU0-U3,DRVCLKD0-D3<R>
HD
G 10bit
B 10bit
VD
PROCESSOR
DRIVER
PD1-M<RIGHT>
B 10bit
st-r
IC9300
CONVERTER
XRST
CTI/TINT
WB-ADJ
I/P
CONVERTER
COLOR
FPCLK
FPDAT0
FPDAT1
XRST
SFVRST
LATCH
CONTRAST
FORMAT
SFRST
Video DATA 48bit DA00-DC15<D/L>
FORMAT CONVERTER/RGB PROCESSOR<L>
IC9301
DATA
ROMDATA00-03 DA14,DA15-DC15<L>
DDR SDRAM<L>(128M)
SUB-FIELD
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<L>
R 10bit
JTAG
DCK
R 10bit
ROMDATA04-15 UA12-UC15<L>
PLASMA AI
G 10bit
NEW
DRVCLKU0-U3,DRVCLKD0-D3<L>
HD
G 10bit
B 10bit
VD
PROCESSOR
DRIVER
PD1-M<LEFT>
TO C10
64
R-UP
D31
32
30
PCU1(R)
60
28
CLKU6(+)
LEU1(R)
CLKU7(-)
58
6
ODEU1(R)
CLRU1(R)
59
61
Q9300
5VDET
52
38
SCAN
DATA
1
SOS6-SC1
P5V
11
TO SC20
D20
P5V
Video DATA 48bit UA00-UC15<U/L>
Video DATA 48bit UA00-UC11<U/R>
DMHR
56
55
DSHR
DMLR
54
36
DSLR
30bit UA06-UC15<R>
Q9306
IC9504
LEVEL CONVERTER
3.3V 5V
IC9505
LEVEL CONVERTER
3.3V 5V
IC9503
LEVEL CONVERTER
3.3V 5V
IC9802,03
3.3V 5V
LEVEL CONVERTER
CLOCK GENE.
CLK7
12
CLK5
CLK6
14
13
7
CLK1
XT
1
20
XTN
IC9200
IC9304
16M FLASH MEMORY
RESET
45
VOUTVCC
IC9602
RESET
P3.3V
DQ4-DQ15
A0-A19
DQ0-DQ3
IC9402
BUS
SWITCH
BUS SW
ODED5,ODED6,PCD5,PCD6,LED5,LED6,CLRD5,CLRD6
UMH,UML,USH,USL,UEH,NUEL
CL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,DVR_RST_0,CSL,CSH,CML,CMH
Sustain Control DATA 6bit
Scan Control DATA 13bit
ODEU1,ODEU2,PCU1,PCU2,LEU1,LEU2,CLRU1,CLRU2
PCK OCK
XCE-L
BYTE
XWE
XOE
R10-R19,G10-G19,B10-B19
UA05-UC12,UC13,UA15<L>
DA14,DA15-DC15<L>
UA12-UC12,UC13,UA15
UA05-UC11
DA14,DA15-DC15<L>
UA12-UC15<L>
UA05-UC10,UB11,UC11<L>
XCE-L
20MHz
84MHz
39.5MHz
60MHz
VD
HD
DCK
DISCHARGE CONTROL
BUS SW
JTAG
FLASH CONTROL
VD
HD
DCK
3
11
16
9
10
6
5
15
8
1
7
2
20
21
18
17
19
4
12
13
14
Control DATA(D)
Control DATA(U)
SS PULSE
SC PULSE
TD0,TD1,TMS,TCK
SOS9_C0NF
DRV_RST
SOS6,7,8
DMHR,DSHR,DSLR,DMLR,DMHL,DSHL,DMLL,DSLL
Data power recovery DATA 8bit
12
20
2
9
DOUTU31C
DOUTU22A
P5V
P5V
P5V
P5V
IIC
SCL SDA
P3V_SCL02
P3V_SDA02
SCL
IIC
P3V_SDA02
SDA
P3V_SCL02
IC9603
BUS SWITCH
XCE-L
D36
30bit DA06-DC15<R>
ODED6(R)
Q9304
DOUTD31C
64
PCD6(R)
TO C60
58
CLKD7(-)
CLKD6(+)
60
LED6(R)
DOUTD22A
59
CLRD6(R)
5VDET
34 6136 34 30
CLKD3(-)
32
CLKD4(+)
LED5(L)
58
P5V
64
L/R-DOWN
D35
60
TO C54
28 59
CLKD2(+)
68
P5V
36261
ODED5(L)
CLRD5(L)
56 38
CLKD5(-)
66
18bit DA10-DC15<L>
Q9305
PCD5(L)
5VDET
18bit DA00-DC05<R>
DOUTD10A
DOUTD21C
R-DOWN
28 63852 56
DMLL
55
DSHL
54
DMHL
32
DSLL
30
DSLR
DMHR
4
DMLR
3
DSHR
2
56
38
66
DOUTU21C
DOUTU16A
DOUTU10A
DOUTU15C
LEU2(L)
TO C24
58
CLKU5(-)
36
P5V
P5V
64
L/R-UP
D32
2
ODEU2(L)
CLRU2(L)
59
34
CLKU4(+)
CLKU3(-)
32
61
PCU2(L)
18bit UA10-UC15<L>
Q9301
5VDET
30
CLKU2(+)
18bit UA00-UC05<R>
68
60
28
DSHL
TO C25
2
5VDET
30bit UA00-UC09<L>
DMLL
4
DMHL
D33
3
L-UP
34
30
36
64
DSLL
Q9302
CLKU0(+)
CLKU1(-)
6
52
38
28
DOUTU9C
DOUTU0A
5VDET
SOS8-SS
48
30
38
64
DOUTD9C
CLKD0(+)
62
32
30bit DA00-DC09<L>
L-DOWN
D34
Q9303
TO C55
28
2
CLKD1(-)
DOUTD0A
54
60
SUSTAIN
DATA
CBK
62 DRV_SOS7
62
DRV_SOS7
CBK
D
DIGITAL SIGNAL PROCESSOR/FORMAT CONVERTER
(Exchange board only)
!
PLASMA AI/SUB-FIELD PROCESSOR
<TSXL576>(D35-CD1)
<TSXL571>
<TSXL572>
<TSXL570>
<TSXL568>(D31-CD1)
CABLE
<TSXL571>
<TSXL574>
<TSXL578>(D36-CD1)
<TSXL569>(C20-CD2)
CABLE
<TSXL575>
<TSXL577>(C90-CD2)
CABLE
<TSXL579>(CY0-CD2)
CABLE
CABLE
CABLE
(D34-CD1)
(C80-CD2)
(D33-CD1)
(C50-CD2)
(C40-CD2)
(D32-CD1)
<TZTNP010XAT>
TH-103PF10WK/TK/RK
D-Board (2 of 2) Block Diagram
TH-103PF10WK/TK/RK
D-Board (2 of 2) Block Diagram
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