Philips 32PFL3605/77 - Page 38

IC Data Sheets
EN 38 RAM1.0L LA8.
2010-Jul-02
8.3 Diagram B10, TPA3101D (IC U23)
Figure 8-4 Internal block diagram and pin configuration
18930_301_100309.eps
100309
Block diagram
Pinning information
32
5
27
10
25
12
PVCCR
RINP
PGNDR
AGND
ACC
V
CN
E
TUM
P
Y
BV
P
TUOR
PTUO
L
C
N
C
N
NRSB
NLS
B
NTUOL
NTUO
R
FLU
AT
GE
R
V
NW
O
D
T
UHS
DNGA
CN
CSOR
P
RSB
P
LSB
PTUOR
NT
U
O
R
N
T
UOL
PTUOL
PVCCR
Exposed
RINN
NC
NC
NC
NC
PGNDR
LINP
VCLAMPR
LINN
VCLAMPL
NC
PGNDL
GAIN0
PGNDL
GAIN1
PVCCL
MSTR/SLV
PVCCL
SYNC
33
4
28
9
26
11
34
3
29
8
35
2
30
7
36
1
31
6
44
17
38
23
43
18
37
24
45
16
39
22
46
15
40
21
47
14
41
20
48
13
42
19
Biases
and
References
Startup
Protection
Logic
VREGok
RINP
RINN
Ramp
Generator
ROSC
VCCok
AVCC
VREG
PWM
Logic
Gain
Control
Gain
Control
LINP
LINN
SHUTDOWN
VBYP
VBYP
MSTR/SLV
PWM
Logic
SYNC
AVCC
AVCC
AVCC
Gain
Control
GAIN0
GAIN1
8
T Adj.
MUTE
FAULT
VREG
AGND
VBYP
VBYP
VREG
VBYP
VClamp
Gen
PVCCR
Gate
Drive
Gate
Drive
VClamp
Gen
Gate
Drive
Thermal
SC
Detect
PVCCR
Gate
Drive
BSLN
VCLAMPL
PVCCL
PVCCL
BSLP
LOUTN
BSRN
VCLAMPR
PVCCR
PVCCR
ROUTN
BSRP
ROUTP
PGNDR
PVCCL
PVCCL
PGNDL
LOUTP
Gain
Gain
Gain
Gain
TLL Input
Buffer
TLL Input
Buffer