Philips 40PFL7605H/12 - Page 141

Circuit Diagrams and PWB Layouts
EN 141Q552.1E LA 10.
2010-Feb-19
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div. table
SPI-Buffer
18770_538_100119.eps
100119
SPI-Buffer
B06D B06D
2009-10-22
2
8204 000 8996
LVDS DVBS
G3
1
2
3EN2
3EN1
3 4
C
D
7GE0 B3
7GE1 A4
C
∗
Buffer
2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
IGE0 B3
IGE1 D2
123 4
A
B
Direct
56
∗
9GE3 D3
1
56
3GE1-4 B3
3GE2 A4
3GE3 B4
3GE4 B3
9GE0-3 D3
9GE1 C3
9GE2 D3
D
A
∗
9GE0-1 C3
9GE0-2 C3
B
2
9GE3
9GE0-3
6
3
IGE0
1 8
47R
3GE0-1
47R
3GE0-3
3 6
10K
3GE2
7GE1
PDTC114EU
9GE0-4
∗∗
5
4
9GE1
9GE0-2
7
2
IGE1
3GE1-4
RES
54
47R
RES
6 3
3GE4
47R
47R
3GE1-3
100n
2GE0
+3V3
+3V3
∗
9GE2
12
11
1
10
19
20
5
6
7
8
9
18
17
16
15
14
13
74LVC245A
2
3
4
7GE0
47R
3GE3
RES
BL-SPI-SDI
PNX-SPI-CLK
BL-SPI-CLK
BL-SPI-SDO
PNX-SPI-CS-BLn
BL-SPI-CSn
PNX-SPI-SDI
PNX-SPI-SDI
PNX-SPI-CS-AMBIn
AMBI-SPI-CS-OUTn_R2-R
BL-SPI-CLK
AMBI-SPI-CLK-OUT-R
PNX-SPI-CLK
PNX-SPI-SDO
AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDO
AMBI-SPI-SDO-OUT-R
BL-SPI-
SDI
PNX-SPI-SDO
PNX-SPI-CSBn