Philips 40PFL7605H/12 - Page 49

Circuit Descriptions
EN 49Q552.1E LA 7.
2010-Feb-19
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div. table
7.1.3 SSB Cell Layout
Figure 7-3 SSB layout cells (top view) (non-DVBS without TCON)
Figure 7-4 SSB layout cells (top view) (DVBS without TCON)
18770_246_100203.eps
100203
VGA
Class-
D
DC/DC
1M991M95
1
7
3
5
1M 20
CA
LOW PROFILE
FLASH
SPO
HD
MI
1.3
HD
MI
1.3
USB
2.0
SD-SLOT
Scart1/YPbPr
Scart2/YPbPr
Pr
Pb
Y
1M36
DDR2
DDR2
FPGA
20,00
DDR2
DDR2
PN X85500
M1
27 x27
1.00m m
DDR
ETH
I²S
SPDIF
ANA
AUD
ANA
VID
STDBY
GPIO
HDMI
CA
TS -IN
LVDS-OUT
USB
RJ45
1
D
3
8
1G51 1G 50
1M 71 1M59 2DDIM
serv
L/R
USB
2.0
Tuner
NO SPLITTER !!!
9187
OUT0
12
3
CTRL
R
L
HD
MI
1.3
HD
MI
1.3
18770_247_100203.eps
100219
VGA
Class-
D
DC/DC
1M991M95
1
7
3
5
1M20
CA
LOW PROFILE
FLASH
SPO
HD
MI
1.3
HD
MI
1.3
USB
2.0
Quad LVDS
SD-SLOT
Scart1/YPbPr
Scart2/YPbPr
Pr
Pb
Y
1M36
DDR2
DDR2
FPGA
20,00
DDR2
DDR2
PN X85500
M1
27 x27
1.00m m
DDR
ETH
I²S
SPDIF
ANA
AUD
ANA
VID
STDBY
GPIO
HDMI
CA
TS -IN
LVDS-OUT
USB
RJ45
1
D
3
8
1G51 1G50
1M 71 1M59 2DDIM
serv
L/R
USB
2.0
Tuner
NO SPLITTER !!!
9187
OUT0
12
3
CTRL
R L
HD
MI
1.3
HD
MI
1.3
DVB-S
DVB-S
1M20
1M36
1G51 1G50
1M 71 1M59 2DDIM