Service Modes, Error Codes, and Fault Finding
EN 18 Q548.1E LB5.
2009-Dec-18
Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1)
18440_216a_090227.eps
091118
No
EJTAG probe
connected ?
No
Yes
ReleaseAVCsystem reset
Feed warm boot script
Cold boot?
Yes
No
Set I²C slave address
of StandbyµPto(A0h)
An EJTAG probe (e.g. WindPower ICE probe) can be
connected for Linux Kernel debugging purposes.
This will allow access to NVM and
NAND FLASH and cannotbedone
earlier becausetheFLASH needs to
be in Write Protect as long as the
suppliesare not available.
Detect EJTAG debugprobe
(pulling pin of the probeinterface to
ground byinserting EJTAG probe)
Release AVC system reset
Feed cold boot script
ReleaseAVCsystem reset
Feed initializing boot script
disable alive mechanism
InitialiseI/Opins of the st-b yµP:
- Switch reset-AVC LOW (reset state)
- Switch WP-NandFlash LOW (protected)
- Switch reset-system LOW (reset state)
- Switch reset-5100 LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
-keepreset-NVM high, Audio-reset and Audio-Mute-Up HIGH
Off
Standby Supply starts running.
All standby supply voltagesbecome available.
st-byµPresets
Stand byor
Protection
Mains isapplied
- Switch Audio-Reset high.
It is low in the standbymodeifthestandby
mode lasted longer than10s.
start keyboard scanning, RC detection. Wake upreasonsare
off.
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
Switch LOW the RESET-NVM line to allow access to NVM. (Add a
2ms delay before trying to address the NVM to allow correct NVM
initialization, this is no issueinthissetup, the delayisautomatically
covered bythearchitectural setup)
ReleaseReset-PNX5100.
PNX5100 will start booting.
This 10ms delayisstill present to give some relaxation
to the supplies. (The PCI arbiter on the PNX5100 is
never used and is not the reason anymore)
Switch HIGH the WP-NandFlashto
allow access to NAND Flash
This enables the +3V3and +5V converter. Asa
result, also+5V-tuner, +2V5, +1V8-PNX8541 and
+1V8-PNX5100 (if present) become available.
Confirmation received from NXP that there does not need to
be a delay between the rise of the +1V2 and the +3V3.Only
requirement is to have the +1V2 before or atthesame time
as the +3V3.150ms delayis deleted.
Delayof50ms needed becauseofthelatency of
the detect-1 circuit. This delayisalsoneededfor
the PNX5100. The reset of the PNX5100 should
only be released 10msafter powering the IC.
Detect2 should be polled on the standard 40ms
interval and startup should becontinued when
detect2 becomes high.
+12V, +24Vs,ALand Bolt-on power
isswitched on, followed by the +1V2 DCDC converter
Enable the supply detection algorithm
No
Yes
Detect-1 I/O line
High?
Switch ON Platform and display supply by switching
LOW the Standby line.
Enable the DCDC converter for +3V3and
+5V. (ENABLE-3V3)
Voltage outputerror:
Layer1: 2
Layer2: 18
No
Detect2 high received
within 2 seconds?
Power-OK error:
Layer1: 3
Layer2: 16
Enter protection
Yes
Wait 50ms
Enter protection
Yes
No
Detect-2 I/O line
High?
Disable 3V3, switch standby
line high and wait 4 seconds
Delay1.5second before checking detect2 line
if the detect2_delay_flagisset
Set detect2_delay_flag
Reset detect2_delay_flag
Carefull we don’t hit this error
directly if the delayflagisset.
Wait fixed time of 15ms
Detect2 high?
Yes
No
Detect-1 I/O line
High?
Wait 50ms
No
Yes
If the supply is hicking, the firstdetect2could
bepositive (12V still present), followed by
negative Supply-fault (already low). Adding a
fixed delay bringsusbehind this delaygap.
Thesechecks prevent the set from going in to
standbyonthefalse error condition where the
first 3V3 is negative becauseofa hickup,
although the 12V was abouttoreappear.
Becauseofthis reappearance, the 12V check
is OK which would cause protection. If we wait
50ms,the3V3should be back as well.
Detect-2 I/O line
High?
Yes
No
Reset detect2_delay_flag
Only usefull in case of PNX5100 present. To avoid
diversity in standbyµP,thereset-PNX5100 will still be
switched bythestandbyµP.
To : 1 8440_216b_090227.eps
To : 1 8440_216b_090227.eps
Wait 10 ms
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