Circuit Descriptions
EN 20 TPM4.1E LA7.
2011-Jan-21
7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Architecture
7.3 T-CON Architecture
Notes:
•Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The TPM4.1E LA chassis is using the MT8222 for main
processing.
7.1.1 Implementation
A key component of this chassis is the TCON TL2428MC
7.1.2 TPM4.1E LA Architecture Overview
• For details about the chassis diagrams refer to
chapter 10. Circuit Diagrams and PWB Layouts.
An overview of the TPM4.1E LA architecture can be found
in Figure 7-1
.
Figure 7-1 Architecture of TPM4.1E LA
18870_210_100308.eps
100308
MM Tuner
74HC4052D
MUX
TV_CVBS
Y,Pb,Pr 1
CVBS1P
CVBS3P
SIF_P
AUDR, AUDL
DDR
SPI Flash
ROM / 4M
24C02
DSUB EDID
24C32
NVRAM
I2C
CS4334
DAC
SPI
UART1
Cloning
(iTV-1)
(5P)
Video I/F
(iTV-2)
Y,Pb,Pr 2
RP,GP,BP
24C02
DVI EDID
Remark : Reserve only for iTV function
WT6703
STDBY MCU
Audio out(AR2, AL2)
Audio In
Monitor Out
TV OUT
Audio out(AR3, AL3)
CVBS out
I2C
Audio In
CVBS_SC0
Tcon
TL2428
MC
Side S -Video
PC Audio
YPbPr 1 Audio
YPbPr 2
AV Audio
MT8222
TTL/LVDS
LCD
Panel
Com Pair
10P
(3P)
(7P)
IR Board
Key Board
2 × (2P)
L-R Speaker
LIPS/PS
control
Side AV
YPbPr 2 Audio
HP
D-SUB
HDMI 1
HDMI 2
Side AV Audio
MAX9728
YPbPr 1
AV IN
MAX9728
MAX9728
TPA3110D
SCART 1
Side USB
AR1,AL1
SCART 2
CVBS2P
(CVBS 0P)
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