Powtran PI500 series - Page 124

Chapter 5 Function parameter
120
Chapter 5
13
Output phase loss
41
Switch motor when running
14
Module overheating
42
Too large speed deviation
15
External fault
43
Motor over-speed
16
Communication abnormal
45
Motor overtemperature
17
Contactor abnormal
51
Initial position error
18
Current detection abnormal
-
COF communication failure
19
Motor auto tuning abnormal
y1.03
Frequency of the third fault
Frequency of the last fault
●
y1.04
Current of the third fault
Current of the last fault
●
y1.05
Bus voltage of the third fault
Bus voltage of the last fault
●
y1.06
Input terminal status of the third
fault
Input terminal status of the last fault, the order
is:
BIT9 BIT8 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 DI0
When the input terminal is ON, the
corresponding binary bits is 1, OFF is 0, all DI
status is converted to the decimal number for
display.
●
y1.07
Output terminal status of the
third fault
Output terminal status of the last fault, the
order is:
When the output terminal is ON, the
corresponding binary bits is 1, OFF is 0, all
DI status is converted to the decimal number
for display.
●
y1.08
Reserved
y1.09
Power-on time of the third fault
Current power-on time of the last fault
●
y1.10
Running time of the third fault
Current running time of the last fault
●
y1.11 to
y1.12
Reserve
y1.13
Frequency of the second fault
Frequency of the last fault
●
y1.14
Current of the second fault
Current of the last fault
●
y1.15
Bus voltage of the second fault
Bus voltage of the last fault
●
y1.16
Input terminal status of the
second fault
Input terminal status of the last fault, the
order is:
BIT9 BIT8 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 DI0
When the input terminal is ON, the
corresponding binary bits is 1, OFF is 0, all
DI status is converted to the decimal number
for display.
●
y1.17
Output terminal status of the
second fault
Output terminal status of the last fault, the
order is:
When the output terminal is ON, the
corresponding binary bits is 1, OFF is 0, all
●
BIT4
BIT3
BIT2
BIT1
BIT0
SPB
REL1
Reserve
SPA
REL2
BIT4
BIT3
BIT2
BIT1
BIT0
SPB
REL1
Reserve
SPA
REL2