Renesas RL78 Series - Page 1185

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1153
Dec 10, 2015
(16) LIN/UART Transmission Control Register (LTRCn)
Address: F06D0H
7 6 5 4 3 2 1 0
— — — — — LNRR
RTS FTS
Value after reset:
0 0 0 0 0 0 0 0
Bit Symbol Bit Name Function R/W
0 FTS LIN Communication Start 0: Header reception or wake-up transmission/reception is
stopped.
1: Header reception or wake-up transmission/reception is
started.
R/W
1 RTS Response Transmission/Reception
Start
0: Response transmission/reception is stopped.
1: Response transmission/reception is started.
R/W
2 LNRR No-Response Request 0: Response to the reception ID is received/transmitted.
1: Response to the reception ID is not received/transmitted.
R/W
7 to 3 — Reserved These bits are always read as 0. The write value should
always be 0.
R/W
FTS bit (LIN communication start bit)
Set the FTS bit to 1 to start header or wake-up reception (counting of the low width of the input signal).
Also set this bit to 1 to allow wake-up transmission.
Only 1 can be written to this bit; 0 cannot be written.
Writing a value to this bit is disabled when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
This bit is set to 0 upon completion of wake-up transmission/reception and transition to LIN reset mode.
RTS bit (response transmission/reception start bit)
Set the RTS bit to 1 when response transmission/reception is started after the header is received and the received ID is
checked. Once set, this bit is automatically cleared to 0 upon completion of response communication or transition to LIN
reset mode.
Only 1 can be written to this bit; 0 cannot be written.
To write 1 to this bit, write 02H to the LTRCn register by using an 8-bit data transfer instruction.
Do not set this bit and the LNRR bit to 1 simultaneously.
Writing a value to this bit is disabled when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
Writing a value to this bit is disabled when the FTS bit is 0 (header reception or wake-up transmission/reception is stopped).
When response data of 9 bytes or more is to be transmitted or received, set this bit to 1 each time a data group (variable
from 0 to 8 bytes) is transmitted or received. Once set, this bit is automatically cleared to 0 upon completion of data group
transmission/reception or transition to LIN reset mode.
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