Renesas RX110

RX Family ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20 Page 14 of 74
Dec 01, 2016
ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A,
ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument
} adc_mode_t;
typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)
{
ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for
// Group modes nor double trigger modes
ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA
ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB
ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow
//(complementary PWM mode)
ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE
ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF
ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA
ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB
ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB
ADC_TRIG_SYNC_ELC = 9, // ELC
ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes
// nor double trigger modes
// This is not set to TRSA or TRSB
} adc_trig_t;
typedef enum e_adc_add
{
ADC_ADD_OFF = 0, // addition is turned off for chans/sensors
ADC_ADD_TWO_SAMPLES = 1,
ADC_ADD_THREE_SAMPLES = 2,
ADC_ADD_FOUR_SAMPLES = 3
} adc_add_t;
typedef enum e_adc_align
{
ADC_ALIGN_RIGHT = 0x0000,
ADC_ALIGN_LEFT = 0x8000
} adc_align_t;
typedef enum e_adc_clear
{
ADC_CLEAR_AFTER_READ_OFF = 0x0000,
ADC_CLEAR_AFTER_READ_ON = 0x0020
} adc_clear_t;
typedef enum e_adc_speed
{
ADC_CONVERT_SPEED_NORM = 0x0000,
ADC_CONVERT_SPEED_HIGH = 0x0400
} adc_speed_t;
typedef struct st_adc_cfg
{
adc_add_t add_cnt;
adc_align_t alignment; // ignored if addition used
adc_clear_t clearing;
adc_speed_t conv_speed;
adc_trig_t trigger; // default and Group A trigger source
adc_trig_t trigger_groupb; // valid only for group modes
uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled
uint8_t priority_groupb; // GBADI interrupt priority; 0-15