Appendix RIGOL
DG800 Performance Verification Guide
Square with 50% duty cycle
Square with 50% duty cycle
Sine, Square, Ramp, Noise, Arb
0% to 100% of the pulse width
2 mHz to 1 MHz
External Modulation Input
Input Range
AM, PM, FM: 75 mVRMS to ±5 (Vac+dc)
ASK, PSK, FSK: standard 5 V TTL
Carrier Waveform
Sine, Square, Ramp, Pulse, Noise, Arb, PRBS, RS232, Sequence (except
DC, dual-tone, and Harmonic)
1 to 1,000,000 or Infinite
Internal, External, Manual
Same as the upper/lower limit of the corresponding carrier frequency
Internal, External, Manual
Falling edge of the sync signal (programmable)
Frequency, Period, Positive/Negative Pulse Width, Duty Cycle
7 digits/s (Gate Time = 1 s)
Measurement Range 4 ns to 1,000 ks