Rohde & Schwarz 890 Series - Automatic Fault Recognition During Operation

V L F > H F R E C E I V E R S f R & S E K 8 9 5 / R & S E K 8 9 6
User Manual f Fault Recognition During Operation (CM)
4.2.2.2 Automatic Fault Recognition During Operation
Within the synthesizer the phase>locked loops for the
f 40>MHz signal (required for conversion of the 1st IF into the 2nd IF and as system clock for the
IF / AF processor),
f 1st oscillator signal (required for conversion of the receive frequency into the 1st IF) and the
f 5.66>MHz signal (required as auxiliary frequency for the IF / AF processor)
as well as the oscillator level of the 2:1 divider (5.66 MHz) are continuously monitored.
Within the IF / AF processor the oscillator levels for the
f 100:1 divider (200 kHz),
f 50:1 divider (400 kHz) and the
f 10:1 divider (2 MHz)
as well as for the phase>locked loop and the watchdog of the digital signal processor are continu>
ously monitored. In addition, the HF input is continuously monitored for overloading (overvolt>
age and overcurrent).
Note:
The CM status can be inquired acc. to 4.2.2.3.
6164.0717.02_01
> 4.7 >