Samsung MultiXpress K7 Series - Page 114

2.ProductSpecicationsandDescription
▪JC92-02736AforLXmodel(K7600LX,K7500LX,K7400LX)
▪JC92-02736BforGXmodel(K7600GX,K7500GX,K7400GX)
-PartName:PBA-MAIN
2)MainControllerfornewmodel(IRUI)
Themaincontrollerconsistsofthemainprocessor(A3000),memory(DDR36GB),eMMC(4GB),1GEthernetPHY,USB3.0
HUB,Micom(Power/Fusercontrol),cancontrolVideo/UI/FAXsignalinterfaceconnection,motordrivingIC,Engine
signalinterfaceconnection,powerinterface.
Themainprocessor(QuadCore1.5GHzCPU)controlsvideo,engine,UIdisplayandcommunicatesthevariousdevices.The
HDDisconnectedtothemaincontrollerbySA TAcableandtotheotherdevice(ADF,DCF,Finisher,Modem)byUART.
1)MainControllerBlockDiagram
U S B 3.0 H U B P B A
O PTION KIT
S C A N N E R
A 3000
P LA T E N
D S D F
D E B U G _M C B
D E B U G _S C B
D E B U G _U I
E N G IN E PA N E L
D S D F
D C F
FIN IS H E R
M O D E M 0
M O D E M 1
U A R T
S C A N IF
C H 1
U S B
3.0
H O S T
U S B
3.0
D E V IC E
S C A N IF
C H 0
M A C 0
M A C 1
S A T A
LS U C
H P V C
M M C
R T S 5401
4Port H U B
R E A R
U S B H O ST
1/2
R E A R
U S B
D EVIC E
R T L8211 E
G igabit phy
R J 4 5
BASE
R J 4 5
EXTEN D
G P IO
P W M
S A T A
2.5", 320G B
4B E A M LS U
Y M C K
LD1,2,3,4
LSU _M O T1
VD O 1B_YM C K
VD O 2B_YM C K
VD O 3B_YM C K
VD O 4B_YM C K
VD O D ATA
CTRL.
eM M C
4G B
Boot D evice
CTRL.
A D C
1.8 V
M A G IC
IO
D D R C
800M hz
32bit
CTRL.
A T S A M D 2E 15
External AD C 12b
FU S E R
NC TH 1 C /D N C TH 2 C /D
FU S E R U N IT
A N A L O G M U X
M P SIZE / PAPER SIZE1,2 /
IN N ER, O U TTER , EXIT, LSU TEM P
H U M ID ITY, M O D EL SEL, AC Level
Step M otor FB / 24V FB
12Bit AD C
EN G INE
S E N S O R
EM PTY 1/2, LIFT1/2, PRE FEED 1/2, FEED
R EG I, M P_EM PTY/SIZEL/W , C U R L2,
FU SER IN /O U T, BIN _FU LL_EXIT1/2,
D U PLEX_JAM 1/2, D U PLEX_RETU RN ,
PAPER_SIZE1/2, W ASTE_IN STALL,
O PC _PH ASE Y/M /C /K, RESERVO IR Y/M /C /K,
TO N ER SUP YM /C K, ITB H O M E, FU SER PO S,
C O VER O PEN FRO N T/SID E,
SC AN HO M E / APS 1,2 SH U TTER AC R ,
PLATEN C O VER O PEN 1,2
S O LE N O ID / C L T
C LT : M P
SO L : M P / EXIT
D C M O T
AC R SH U TTER, C ST LO C K 1/2
FA N
EXIT1/2/3/4,SM PS(LX/G X),
C PU , LSU , D EVE,SID E,
FU SER O U T
H V P S
M H V YM C K
D EV DC YM C K
D EV AC VPP YM C K
D EV AC
D EV AC EN YM C K
TH V1 YM C K
TH V2(C V/C C ) / TH V
C LEAN
SA W / FU SER BIA S
B LD C
O PC Y,M ,C ,K/ITB,
FU SER
S T E P M O T
PIC KU P1/2, FEED , REG I, T1 EN G AG E,
D U PLEX_RET/1/2, SKEW Y/M /C ,
W TB, FUSER RELEASE, TO NER SU PPLY
YM /C K, TO N ER R ESERVO IR YM /C K ,
C ST LO C K,
D R V 8825
X15
S I-7321M
X2
A N 4 4061A
X1
D D R 3 6 G B
O n-board 4G B
D IM M 2G B
CTRL.
R T S 5411
4Port H U B
R T L8211 E
G igabit phy
S P II2 C
FU S E R
P T B
R T C
2
nd
N W
D IM M
T O N E R C R U M
O P C C R U M
FR O N T
U S B
H O S T
O P E IR
10 .1 "
T FT L C D
W IFI/N FC M O D U LE
C A R D R E A D E R
P C Iex
E FI V ID E O
C O N T R O LLE R
C h2
C h1
C h0
C h0
C h1
C h2
C h3
C h5
C h6
C h7
C h10
C h11
C h9
A T S A M D 2E 15
C h4
A N A L O G M U X
READ M H V YM C K , TH V YM C K
TC YM C K / C TD ,AC R / FU SER / W TB
E FI
M S O K /T P M
LC D
C o n .
IR P B A
C h3
* C olor m odel
2)MainControllerClockDiagram
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