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Sanyo DC-F320 - Integrated Circuit Block Diagrams and Descriptions; IC101 CXA1782 CQ (Servo Signal Processor); IC231 LA1 832 ML

Sanyo DC-F320
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IC
BLOCK DIAGRAM
&
DESCRIPTION
ICl
01
CXAl782CQ
(SERVO
SIGNAL PROCESSOR)
F;yci$r
connection pin for detect time
Ground this pin through a capacitor when
decreasing the focus servo high-frequency gain.
FE-0
lthe focus servo low frequency.’
0
~Focus
drive outout.
13
1
TA-0
1
0
ITracking
driveoutput.
14
1
SPY
1
1
ISled amplifier non-inverted
input.
15
i
SLM
1
I
ISled
amolifier neaative input.
mm1
sL_O
1
0
ISled
drive
outout.
I
17
ISET
I
Setting pin fo
lr
Focus
search, Tracking jump and
Sled kick cur
a^
I
18
I
.
,a_ -
_.
.
vbL
1
-
1+5.uv
19
1
CLK
I
l
ISerial data transfer clock inputfro
P
1
XLT
I I
ILatch
inoutfrom CPU.
\
21
DATA
I
Serial data input from CPU.
P
XRST
I
Reset input; resets at Low.
23
COUT
0
Track number count signal output.
24
SENS
0
Outputs FZC, DFCT, TZC, Gain, BAL, and
others according to the command from CPU.
25
FOK
0
Focus OK comparator output.
lC497 NJM7805FA
I
KIA7805PI
IC231 LA1 832ML
SOA CONTROL
.’
.
1
OUTPUT PASS
No.
I
PIN NAME
I
VO
j
Function
I
I
26
cc2
o
Input pin for the DEFECT bottom hold output
capacitance-coupled.
27
cc1
I
DEFECT bottom hold output.
28
CB
Connection pin for DEFECT bottom hold
I
capacitor.
29
CP
Connection pin for
MIRR
hold capacitor.
MIRR
comparator non-inverted input.
30
RF-1
input pin for the RF summing amplifier output
capacitance-coupled.
31
RF-0
o
RF summing amplifier output. Eye pattern check
nnint
_..
.
RF summing amplifier inverted input. The RF
3?
RF-M
I
amplifier gain is determined by the resistance
connected between this pin and RF0 pin.
33
__
LD
I
0
APC(Auto Power Controller) amolifier output.
I
>
34
I
PHD
I
I
IAPC(Auto
Power Controller) amplifier input.
_I
I__
,
IRF I-V amolifier inverted
inout.
Connect these
c
these pins to the photo diodes F and E.
40
El
_
I-V amplifier E gain adjustment. (When not using
automatic balance adjustment.)
41
VEE
-
Ground
42
TEO
o
Tracking error amplifier output. E-F signal
OUtpt.
43
LPFI
I
Comparator input for balance adjustment. (Input
from TEO through LPF.)
44
TEI
I
Tracking error input.
45
ATSC
I
Window comparator input for ATSC detection.
46
Ti!C
I
Tracking zero-cross comparator input.
47
TDFCT I
Capacitor connection pin for defect time
coflstant.
43
VC
0
(VCC
+
VEE)
/ 2 DC voltaae output.
3
INPUT
)
OUTPUT
> GND
ISTEREOI
-
28
-
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