Sanyo DC-MP7500(BK)/(XE) - IC441 TC9422 F (Volume Control); IC601 PT6315 (VFD Driver; Controller IC)

- 16 -
GND
2
1
V DD
28
3
4
5
6
7
8
9
10
11
12
13 14 15 16
27
26
25
24
23
22
21
20
19
18
17
Vref CK DATA STB
32BIT SR
50k
500
750
50k
100k
MAIN VR
50k / 64STEP
13k
13k
1k
BASS VR
50k /
16STEP
TREBLE VR
50k /
16STEP
50k
CAPACITOR FOR
OSCILLATION
GAIN CONTROL
0, 6, 12, 18dB
INPUT
SELECTOR
500
750
50k
100k
MAIN VR
50k / 64STEP
13k
13k
1k
BASS VR
50k /
16STEP
TREBLE VR
50k /
16STEP
CAPACITOR FOR
OSCILLATION
GAIN CONTROL
0, 6, 12, 18dB
INPUT
SELECTOR
L-IN1
L-IN2
L-IN3
L-IN4
L-SW-OUT
L-VR-IN
L-B1
L-B2
L-B3
L-Tone-OUT
L-T1
R-IN1
R-IN2
R-IN3
R-IN4
R-SW-OUT
R-VR-IN
R-B1
R-B2
R-B3
R-Tone-OU
T
R-T1
IC441 TC9422F (Volume Control)
IC BLOCK DIAGRAM & DESCRIPTION
IC601 PT6315 (VFD Driver / Controller IC)
OSC
Serial
Data
Interface
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
31
32
33
34
35
36
37
38
42
41
40
39
1
2
3
4
7
6
8
9
5
30131110
Control
Display Memory
(24 bits x 17 Words)
Key Moter Memory
LED
Driver
Grid
Driver
Segment
Driver
Grid
Driver
Key Scan
Output
Driving Circuit
TI~inc Generator
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
SG5/KS5
SG6/KS6
SG7/KS7
SG8/KS8
SG9/KS9
SG10/KS10
SG11/KS11
SG12/KS12
SG13/KS13
SG14/KS14
SG15/KS15
SG16/KS16
SG17/GR12
SG18/GR11
SG19/GR10
SG20/GR9
SG21/GR8
SG22/GR7
SG23/GR6
SG24/GR5
GR1
GR2
GR3
GR4
LED1
LED2
LED3
LED4
DIN
DOUT
CLK
STB
OSC
VEEGNDVDDK2
K1
Description
LED Output Pin
Oscillator Input Pin
A resistor is connected to this pin to
determinc the oscillation frequency
Data Output Pin (N-Channel, Open-Drain)
This pin outputs scrial data at the falling
edge of the shift clock
(starting from the lower bit)
Data Input Pin
This pin inputs serial data at the rising edge
of the shift clock (starting from the lower bit)
Clock Input Pin
This pin reads serial data at the rising edge
and outputs data at the falling edge.
Serial Interface Strobe Pin
The data input after the STB has fallen is
processed as a command.
When this pin "HIGH",CLK is ignored,
Key Data Input Pins
The data inputted to these pins are fatched
at the end of the display cycle.
Logic Ground Pin
Logic Power Supply
High-Voltage Segment Output Pins
Also acts as the Key Source
Pull-Down Level
High Voltage Segment/Grid Output Pins
High-Voltage Grid Output Pins
Pin No.
1 to 4
5
6
7
8
9
10, 11
12, 44
13, 43
14 to 29
30
31 to 38
39 to 42
I/O
O
I
O
I
I
I
I
-
-
O
-
O
O
Pin Name
LED1 to LED4
OSC
DOUT
DIN
(Schmitt Trigger)
CLK
(Schmitt Trigger)
STB
(Schmitt Trigger)
K1 to K2
VSS
VDD
SG1/KS1 to
SG16/KS16
VEE
SG17/GR12 to
SG24/GR5
GR4 to GR1