Sanyo DP42848 - Page 37

— 37 —
DCLK
R17 - R10
G17 - G10
B17 - B10
TTL INPUT LATCH
PLL
A0
HSYNC, VSYNC, DE
R_FB, R_FDE, DUAL
R27 - R20
G27 - G20
B27 - B20
PWR_UP
DATA SERIALIZER
48
A1
A2
A3
A4
A5
A6
A7
CLK1
CLK2
VCC
PRE
PLLSEL
IC6400, LVDS Transmitter
1
2
3 4 5
6
8
7
SUPPLY VOLTAGE
BLOCK DIAGRAM
5μA
1.25V
N.C.
N.C.
INPUT
N.C. GND DELAY CAPACITOR
OUTPUT
IC5900, Voltage detecting delay circuit